UPD78F0500AMC-CAB-AX Renesas Electronics America, UPD78F0500AMC-CAB-AX Datasheet - Page 210

• Manufacturer Part Number: UPD78F0500AMC-CAB-AX
• Description: MCU 8BIT 30SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0500AMC-CAB-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
(2) Port registers (Pxx)
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
Symbol
These registers write the data that is output from the chip when data is output from a port.
If the data is read in the input mode, the pin level is read. If it is read in the output mode, the output latch value is
read.
These registers can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears these registers to 00H.
P12
P0
P1
P2
P3
P6
Note
Pmn
0
1
P17
7
0
0
0
0
0
“0” is always read from the output latch of P121 and P122 if the pin is in the external clock input mode.
Output 0
Output 1
P16
6
0
0
0
0
0
Output data control (in output mode)
P15
5
0
0
0
0
0
Figure 5-34. Format of Port Register (78K0/KB2)
P14
4
0
0
0
0
0
P13
P23
P33
3
0
0
0
m = 0 to 3, 6, 12; n = 0 to 7
P122
P12
P22
P32
2
0
0
Note
P121
Input low level
Input high level
P01
P11
P21
P31
P61
1
Note
P120
P00
P10
P20
P30
P60
Input data read (in input mode)
0
CHAPTER 5 PORT FUNCTIONS
Address
FF0CH
FF00H
FF01H
FF02H
FF03H
FF06H
00H (output latch)
00H (output latch)
00H (output latch)
00H (output latch)
00H (output latch)
00H (output latch)
After reset
R/W
R/W
R/W
R/W
R/W
R/W
R/W
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