DF61657CN35FTV Renesas Electronics America, DF61657CN35FTV Datasheet - Page 724

IC H8SX/1657 MCU FLASH 120TQFP

DF61657CN35FTV

Manufacturer Part Number
DF61657CN35FTV
Description
IC H8SX/1657 MCU FLASH 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of DF61657CN35FTV

Core Processor
H8SX
Core Size
32-Bit
Speed
35MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
82
Program Memory Size
768KB (768K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
For Use With
3DK1657 - DEV EVAL KIT FOR H8SX/1657
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number:
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Part Number:
DF61657CN35FTV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 18 Flash Memory (0.18-µm F-ZTAT Version)
In user boot mode, though the user boot MAT can be seen in the flash memory space, the user
MAT is hidden in the background. Therefore, the user MAT and user boot MAT are switched
while the user MAT is being programmed. Because the user boot MAT is hidden while the user
MAT is being programmed, the procedure program must be executed in an area other than flash
memory. After programming completes, switch the memory MATs again to return to the first
state.
Memory MAT switching is enabled by setting FMATS. However note that access to a memory
MAT is not allowed until memory MAT switching is completed. During memory MAT switching,
the LSI is in an unstable state, e.g. if an interrupt occurs, from which memory MAT the interrupt
vector is read is undetermined. Perform memory MAT switching in accordance with the
description in section 18.11, Switching between User MAT and User Boot MAT.
Except for memory MAT switching, the programming procedure is the same as that in user
program mode.
The area that can be executed in the steps of the procedure program (on-chip RAM, user MAT,
and external space) is shown in section 18.8.4, On-Chip Program and Storable Area for Program
Data.
Rev. 2.00 Jun. 28, 2007 Page 698 of 864
REJ09B0341-0200

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