DF61657CN35FTV Renesas Electronics America, DF61657CN35FTV Datasheet - Page 626

• Manufacturer Part Number: DF61657CN35FTV
• Description: IC H8SX/1657 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61657CN35FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 35MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 768KB (768K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: 3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 14 Serial Communication Interface (SCI)
14.6
Figure 14.14 shows the general format for clocked synchronous communication. In clocked
synchronous mode, data is transmitted or received in synchronization with clock pulses. One
character in transfer data consists of 8-bit data. In data transmission, the SCI outputs data from one
falling edge of the synchronization clock to the next. In data reception, the SCI receives data in
synchronization with the rising edge of the synchronization clock. After 8-bit data is output, the
transmission line holds the MSB output state. In clocked synchronous mode, no parity bit or
multiprocessor bit is added. Inside the SCI, the transmitter and receiver are independent units,
enabling full-duplex communication by use of a common clock. Both the transmitter and the
receiver also have a double-buffered structure, so that the next transmit data can be written during
transmission or the previous receive data can be read during reception, enabling continuous data
transfer.
14.6.1
Either an internal clock generated by the on-chip baud rate generator or an external
synchronization clock input at the SCK pin can be selected, according to the setting of the CKE1
and CKE0 bits in SCR. When the SCI is operated on an internal clock, the synchronization clock
is output from the SCK pin. Eight synchronization clock pulses are output in the transfer of one
character, and when no transfer is performed the clock is fixed high. Note that in the case of
reception only, the synchronization clock is output until an overrun error occurs or until the RE bit
is cleared to 0.
Rev. 2.00 Jun. 28, 2007 Page 600 of 864
REJ09B0341-0200
Figure 14.14 Data Format in Clocked Synchronous Communication (LSB-First)
Operation in Clocked Synchronous Mode
Clock
Synchronization
clock
Serial data
Note: * Holds a high level except during continuous transfer.
Don't care
*
LSB
Bit 0
One unit of transfer data (character or frame)
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
MSB
Bit 7
Don't care
*