DF61657CN35FTV Renesas Electronics America, DF61657CN35FTV Datasheet - Page 46

• Manufacturer Part Number: DF61657CN35FTV
• Description: IC H8SX/1657 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61657CN35FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 35MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 768KB (768K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: 3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 2 CPU
• Exception Vector Table and Memory Indirect Branch Addresses
• Stack Structure
Rev. 2.00 Jun. 28, 2007 Page 20 of 864
REJ09B0341-0200
In normal mode, the top area starting at H'0000 is allocated to the exception vector table. One
branch address is stored per 16 bits. The structure of the exception vector table is shown in
figure 2.2.
The memory indirect (@@aa:8) and extended memory indirect (@@vec:7) addressing modes
are used in the JMP and JSR instructions. An 8-bit absolute address included in the instruction
code specifies a memory location. Execution branches to the contents of the memory location.
The stack structure of PC at a subroutine branch and that of PC and CCR at an exception
handling are shown in figure 2.3. The PC contents are saved or restored in 16-bit units.
SP
Notes: 1.
(a) Subroutine Branch
2.
3.
Figure 2.2 Exception Vector Table (Normal Mode)
When EXR is not used it is not stored on the stack.
SP when EXR is not used.
Ignored on return.
H'0000
H'0001
H'0002
H'0003
Figure 2.3 Stack Structure (Normal Mode)
(16 bits)
PC
Reset exception vector
Reset exception vector
(SP
SP
*
2
)
(b) Exception Handling
Exception
vector table
Reserved*
(16 bits)
CCR*3
EXR*
CCR
PC
1
1,
*
3