DF61657CN35FTV Renesas Electronics America, DF61657CN35FTV Datasheet - Page 413

• Manufacturer Part Number: DF61657CN35FTV
• Description: IC H8SX/1657 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61657CN35FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 35MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 768KB (768K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: 3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Port
P2
P3
3
2
1
0
7
6
5
4
Output
Specification
Signal Name
TIOCD3_OE
PO3_OE
TIOCC3_OE
TMO0_OE
TxD0_OE
PO2_OE
TIOCA3_OE
PO1_OE
TIOCB3_OE
SCK0_OE
PO0_OE
TIOCB2_OE
PO15_OE
TIOCA2_OE
PO14_OE
DACK1B_OE
TIOCB1_OE
PO13_OE
TEND1B_OE
TIOCA1_OE
PO12_OE
Output
Signal
Name
TIOCD3
PO3
TIOCC3
TMO0
TxD0
PO2
TIOCA3
PO1
TIOCB3
SCK0
PO0
TIOCB2
PO15
TIOCA2
PO14
DACK1
TIOCB1
PO13
TEND1
TIOCA1
PO12
Signal Selection
Register Settings
PFCR7.DMAS1[A,B] = 01 DACR.AMS = 1, DMDR.DACKE = 1
PFCR7.DMAS1[A,B] = 01 DMDR.TENDE = 1
TPU.TIOR2.IOB3 = 0, TPU.TIOR2.IOB[1,0]
TPU.TIOR2.IOA3 = 0, TPU.TIOR2.IOA[1,0]
Peripheral Module Settings
TPU.TMDR.BFB = 0, TPU.TIORL3.IOD3
= 0, TPU.TIORL3.IOD[1,0] = 01/10/11
NDERL.NDER3 = 1
TPU.TMDR.BFA = 0, TPU.TIORL3.IOC3
= 0, TPU.TIORL3.IOD[1,0] = 01/10/11
TCSR.OS[3,2] = 01/10/11 or TCSR.OS[1,0]
= 01/10/11
SCR.TE = 1
NDERL.NDER2 = 1
TPU.TIORH3.IOA3 = 0,
TPU.TIORH3.IOA[1,0] = 01/10/11
NDERL.NDER1 = 1
TPU.TIORH3.IOB3 = 0,
TPU.TIORH3.IOB[1,0] = 01/10/11
When SCMR_0.SMIF = 1:
SCR_0.TE = 1 or SCR_0.RE = 1 while
SMR_0.GM = 0, SCR_0.CKE [1, 0] = 01 or
while SMR_0.GM = 1
When SCMR_0.SMIF = 0:
SCR_0.TE = 1 or SCR_0.RE = 1 while
SMR_0.C/A = 0, SCR_0.CKE [1, 0] = 01 or
while SMR_0.C/A = 1, SCR_0.CKE 1 = 0
NDERL.NDER0 = 1
= 01/10/11
NDERH.NDER15 = 1
= 01/10/11
NDERH.NDER14 = 1
TPU.TIOR1.IOB3 = 0, TPU.TIOR1.IOB[1,0]
= 01/10/11
NDERH.NDER13 = 1
TPU.TIOR1.IOA3 = 0, TPU.TIOR1.IOA[1,0]
= 01/10/11
NDERH.NDER12 = 1
Rev. 2.00 Jun. 28, 2007 Page 387 of 864
Section 9 I/O Ports
REJ09B0341-0200