DF61657CN35FTV Renesas Electronics America, DF61657CN35FTV Datasheet - Page 484

• Manufacturer Part Number: DF61657CN35FTV
• Description: IC H8SX/1657 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61657CN35FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 35MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 768KB (768K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: 3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 10 16-Bit Timer Pulse Unit (TPU)
(2)
Figure 10.18 illustrates the operation when counting upon TCNT_2 overflow/underflow has been
set for TCNT_1, TGRA_1 and TGRA_2 have been designated as input capture registers, and the
TIOC pin rising edge has been selected.
When a rising edge is input to the TIOCA1 and TIOCA2 pins simultaneously, the upper 16 bits of
the 32-bit data are transferred to TGRA_1, and the lower 16 bits to TGRA_2.
Figure 10.19 illustrates the operation when counting upon TCNT_2 overflow/underflow has been
set for TCNT_1, and phase counting mode has been designated for channel 2.
TCNT_1 is incremented by TCNT_2 overflow and decremented by TCNT_2 underflow.
Rev. 2.00 Jun. 28, 2007 Page 458 of 864
REJ09B0341-0200
Examples of Cascaded Operation
TCNT_1
clock
TCNT_1
TCNT_2
clock
TCNT_2
TIOCA1,
TIOCA2
TGRA_1
TGRA_2
TCLKC
TCLKD
TCNT_2
TCNT_1
H'FFFF
H'03A1
Figure 10.18 Example of Cascaded Operation (1)
Figure 10.19 Example of Cascaded Operation (2)
FFFD
0000
FFFE
FFFF
0000
H'0000
0001
H'03A2
H'03A2
H'0000
0001
0002
0001
0000
H'0001
FFFF
0000