DF2218BR24V Renesas Electronics America, DF2218BR24V Datasheet - Page 667

• Manufacturer Part Number: DF2218BR24V
• Description: IC H8S/2218 MCU FLASH 112-LFBGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2218BR24V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: SCI, SmartCard, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 6x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-LFBGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2218-SS - KIT DEV H8S/2218 WINDOWS SIDESHW3DK2218 - DEV EVAL KIT H8S/2218
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

20.1
The registers relating to the power down mode are shown below. For details on the low power
control register (LPWRCR), refer to section 19.1.2, Low Power Control Register (LPWRCR). For
details on the system clock control register (SCKCR), refer to section 19.1.1, System Clock
Control Register (SCKCR).
• Standby control register (SBYCR)
• System clock control register (SCKCR)
• Low power control register (LPWRCR)
• Timer control/status register (TCSR_1)
• Module stop control register A (MSTPCRA)
• Module stop control register B (MSTPCRB)
• Module stop control register C (MSTPCRC)
• Extended module stop register (EXMDLSTP)
20.1.1
SBYCR performs software standby mode control.
Bit
7
Bit Name Initial Value
SSBY
Register Descriptions
Standby Control Register (SBYCR)
0
R/W
R/W
Description
Software Standby
This bit specifies the transition mode after executing the
SLEEP instruction
0: Shifts to sleep mode when the SLEEP instruction is
1: Shifts to software standby mode, subactive mode, or
This bit does not change when clearing software standby
mode by using external interrupts and shifting to normal
operation. 0 should be written to this bit for clearing.
executed in high-speed mode or medium-speed
mode.
Shifts to subsleep mode when the SLEEP instruction
is executed in subactive mode.
watch mode when the SLEEP instruction is executed
in high-speed mode or medium-speed mode.
Shifts to watch mode or high-speed mode when the
SLEEP instruction is executed in subactive mode.
Rev.7.00 Dec. 24, 2008 Page 611 of 698
REJ09B0074-0700