DF2218BR24V Renesas Electronics America, DF2218BR24V Datasheet - Page 247

• Manufacturer Part Number: DF2218BR24V
• Description: IC H8S/2218 MCU FLASH 112-LFBGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2218BR24V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: SCI, SmartCard, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 6x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-LFBGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2218-SS - KIT DEV H8S/2218 WINDOWS SIDESHW3DK2218 - DEV EVAL KIT H8S/2218
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Figure 7.11 illustrates operation in block transfer mode when MARA is designated as a block area.
ETCRAL is decremented by 1 each time a byte or word transfer is performed. In response to a
single transfer request, burst transfer is performed until the value in ETCRAL reaches H'00.
ETCRAL is then loaded with the value in ETCRAH. At this time, the value in the MAR register
for which a block designation has been given by the BLKDIR bit in DMACRA is restored in
accordance with the DTSZ, SAID/DAID, and SAIDE/DAIDE bits in DMACR.
ETCRB is decremented by 1 every block transfer, and when the count reaches H'0000 the DTE bit
is cleared and transfer ends. If the DTIE bit is set to 1 at this point, an interrupt request is sent to
the CPU. Figure 7.12 shows the operation flow in block transfer mode.
Address T
Address B
Notes:
Address T
Address T
Address B
Address B
A
A
Figure 7.11 Operation in Block Transfer Mode (BLKDIR = 1)
L A = Value set in MARA
L B = Value set in MARB
N = Value set in ETCRB
M = Value set in ETCRAH and ETCRAL
A
B
A
B
= L
= L
= L
= L
A
B
A
B
+ SAIDE · (–1)
+ DAIDE · (–1)
Block area
SAID
DAID
· (2
· (2
DTSZ
DTSZ
Consecutive transfer
of M bytes or words
is performed in
response to one
request
· (N–1))
· (M · N–1))
Transfer
Rev.7.00 Dec. 24, 2008 Page 191 of 698
1st block
2nd block
Nth block
REJ09B0074-0700
Address T
Address B
B
B