DF2218BR24V Renesas Electronics America, DF2218BR24V Datasheet - Page 465

IC H8S/2218 MCU FLASH 112-LFBGA

DF2218BR24V

Manufacturer Part Number
DF2218BR24V
Description
IC H8S/2218 MCU FLASH 112-LFBGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheets

Specifications of DF2218BR24V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
24MHz
Connectivity
SCI, SmartCard, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
112-LFBGA
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2218-SS - KIT DEV H8S/2218 WINDOWS SIDESHW3DK2218 - DEV EVAL KIT H8S/2218
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2218BR24V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
and clear TDRE flag in SSR to 0
Clear DR to 0 and set DDR to 1
Write transmit data to TDR
Read TDRE flag in SSR
Read TEND flag in SSR
Clear TE bit in SCR to 0
All data transmitted?
Start transmission
Figure 12.10 Sample Serial Data Transmission Flowchart
Break output?
Initialization
TDRE = 1
TEND = 1
<End>
Yes
Yes
Yes
Yes
No
No
No
No
[1]
[2]
[3]
[4]
[1]
[2]
[3]
[4]
Rev.7.00 Dec. 24, 2008 Page 409 of 698
SCI initialization:
The TxD pin is automatically designated
as the transmit data output pin.
After the TE bit is set to 1, a frame of 1s
is output, and transmission is enabled.
SCI status check and transmit data write:
Read SSR and check that the TDRE flag
is set to 1, then write transmit data to
TDR and clear the TDRE flag to 0.
Serial transmission continuation
procedure:
To continue serial transmission, read 1
from the TDRE flag to confirm that writing
is possible, then write data to TDR, and
then clear the TDRE flag to 0. Checking
and clearing of the TDRE flag is
automatic when the DMAC is activated
by a transmit data empty interrupt (TXI)
request, and data is written to TDR.
Break output at the end of serial
transmission:
To output a break in serial transmission,
set DDR for the port corresponding to the
TxD pin to 1, clear DR to 0, then clear the
TE bit in SCR to 0.
REJ09B0074-0700

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