DF2218BR24V Renesas Electronics America, DF2218BR24V Datasheet - Page 336

• Manufacturer Part Number: DF2218BR24V
• Description: IC H8S/2218 MCU FLASH 112-LFBGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2218BR24V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: SCI, SmartCard, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 6x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-LFBGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2218-SS - KIT DEV H8S/2218 WINDOWS SIDESHW3DK2218 - DEV EVAL KIT H8S/2218
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Table 9.3
Notes: 1. Synchronous operation setting is performed by setting the SYNC bit in TSYR to 1.
Table 9.4
Notes: 1. Synchronous operation setting is performed by setting the SYNC bit in TSYR to 1.
Rev.7.00 Dec. 24, 2008 Page 280 of 698
REJ09B0074-0700
Channel
0
Channel
1, 2
2. When TGRC or TGRD is used as a buffer register. TCNT is not cleared because the
2. Bit 7 is reserved in channels 1 and 2. It is always read as 0 and cannot be modified.
buffer register setting has priority, and compare match/input capture dose not occur.
CCLR2 to CCLR0 (channel 0)
CCLR2 to CCLR0 (channels 1 and 2)
Bit 7
CCLR2
0
1
Bit 7
Reserved*
0
2
Bit 6
CCLR1
0
1
0
1
Bit 6
CCLR1
0
1
Bit 5
0
1
0
1
0
1
0
1
Bit 5
0
1
0
1
CCLR0
CCLR0
TCNT clearing disabled
TCNT cleared by TGRA compare
match/input capture
TCNT cleared by TGRB compare
match/input capture
TCNT cleared by counter clearing for
another channel performing synchronous
clearing/synchronous operation*
TCNT clearing disabled
TCNT cleared by TGRC compare
match/input capture*
TCNT cleared by TGRD compare
match/input capture*
TCNT cleared by counter clearing for
another channel performing synchronous
clearing/synchronous operation*
TCNT clearing disabled
TCNT cleared by TGRA compare
match/input capture
TCNT cleared by TGRB compare
match/input capture
TCNT cleared by counter clearing for
another channel performing synchronous
clearing/synchronous operation*
Description
Description
2
2
1
1
1