DF2218BR24V Renesas Electronics America, DF2218BR24V Datasheet - Page 139
![IC H8S/2218 MCU FLASH 112-LFBGA](/photos/12/42/124228/df2218br24v_sml.jpg)
DF2218BR24V
Manufacturer Part Number
DF2218BR24V
Description
IC H8S/2218 MCU FLASH 112-LFBGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Specifications of DF2218BR24V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
24MHz
Connectivity
SCI, SmartCard, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
112-LFBGA
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2218-SS - KIT DEV H8S/2218 WINDOWS SIDESHW3DK2218 - DEV EVAL KIT H8S/2218
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2218BR24V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 139 of 758
- Download datasheet (5Mb)
4.3
A reset has the highest exception priority.
When the RES or MRES* pin goes low, all processing halts and this LSI enters the reset state. To
ensure that this LSI is reset, hold the RES pin low for at least 20 ms at power-up or hold the RES
or MRES* pin low for at least 20 states during operation.
A reset initializes the internal state of the CPU and the registers of on-chip peripheral modules.
This LSI can also be reset by overflow of the watchdog timer. For details, see section 10,
Watchdog Timer (WDT).
Immediately after a reset, interrupt control mode 0 is set.
Notes: TRST in the HD64F2218, HD64F2218U, HD64F2218CU and HD64F2217CU, which
4.3.1
A reset can be of either of two types for the H8S/2218 Group: a power-on reset or a manual reset.
A reset for the H8S/2212 Group is power-on reset. Reset types are shown in table 4.3. A power-on
reset should be used when powering on.
The internal state of the CPU is initialized by either type of reset. A power-on reset also initializes
all the registers in the on-chip peripheral modules, while a manual reset initializes all the registers
in the on-chip peripheral modules except for the bus controller and I/O ports, which retain their
previous states.
With a manual reset, since the on-chip peripheral modules are initialized, ports used as on-chip
peripheral module I/O pins are switched to I/O ports controlled by DDR and DR.
* Supported only by the H8S/2218 Group.
incorporate a boundary scan function, should be brought low when power is on. For
details, see section 13, Boundary Scan Function.
Reset
Reset Types
Rev.7.00 Dec. 24, 2008 Page 83 of 698
REJ09B0074-0700
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