DF2218BR24V Renesas Electronics America, DF2218BR24V Datasheet - Page 353

• Manufacturer Part Number: DF2218BR24V
• Description: IC H8S/2218 MCU FLASH 112-LFBGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2218BR24V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: SCI, SmartCard, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 6x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-LFBGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2218-SS - KIT DEV H8S/2218 WINDOWS SIDESHW3DK2218 - DEV EVAL KIT H8S/2218
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

9.3.6
The TCNT registers are 16-bit counters. The TPU has three TCNT counters, one for each channel.
The TCNT counters are initialized to H'0000 by a reset, and in hardware standby mode. The
TCNT counters cannot be accessed in 8-bit units; they must always be accessed as a 16-bit unit.
9.3.7
The TGR registers are 16-bit registers with a dual function as output compare and input capture
registers. The TPU has 16 TGR registers, four each for channel 0 and two each for channels 1 and
2. TGRC and TGRD for channel 0 can also be designated for operation as buffer registers. The
TGR registers cannot be accessed in 8-bit units; they must always be accessed as a 16-bit unit.
TGR buffer register combinations are TGRA—TGRC and TGRB—TGRD.
9.3.8
TSTR is an 8-bit readable/writable register that selects operation/stoppage for channels 0 to 2.
When setting the operating mode in TMDR or setting the count clock in TCR, first stop the TCNT
counter.
Bit
7 to
3
2
1
0
Bit Name Initial Value
–
CST2
CST1
CST0
Timer Counter (TCNT)
Timer General Register (TGR)
Timer Start Register (TSTR)
All 0
0
0
0
R/W
–
R/W
R/W
R/W
Reserved
The write value should always be 0.
Counter Start 2 to 0 (CST2 to CST0)
These bits select operation or stoppage for TCNT.
If 0 is written to the CST bit during operation with the
TIOC pin designated for output, the counter stops but the
TIOC pin output compare output level is retained.
If TIOR is written to when the CST bit is cleared to 0, the
pin output level will be changed to the set initial output
value.
0: TCNT_2 to TCNT_0 count operation is stopped
1: TCNT_2 to TCNT_0 performs count operation
Description
Rev.7.00 Dec. 24, 2008 Page 297 of 698
REJ09B0074-0700