AT91SAM9G45-CU-999 Atmel, AT91SAM9G45-CU-999 Datasheet - Page 806

• Manufacturer Part Number: AT91SAM9G45-CU-999
• Description: IC MCU ARM9 APMC 324TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9G45-CU-999

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 400MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 1.1 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

AT91SAM9G45
• DCRCE: Data CRC Error
0 = No error.
1 = A CRC16 error has been detected in the last data block. Cleared by reading in the HSMCI_SR register.
• DTOE: Data Time-out Error
0 = No error.
1 = The data time-out set by DTOCYC and DTOMUL in HSMCI_DTOR has been exceeded. Cleared by reading in the
HSMCI_SR register.
• CSTOE: Completion Signal Time-out Error
0 = No error.
1 = The completion signal time-out set by CSTOCYC and CSTOMUL in HSMCI_CSTOR has been exceeded. Cleared by
reading in the HSMCI_SR register. Cleared by reading in the HSMCI_SR register.
• BLKOVRE: DMA Block Overrun Error
0 = No error.
1 = A new block of data is received and the DMA controller has not started to move the current pending block, a block over-
run is raised. Cleared by reading in the HSMCI_SR register.
• DMADONE: DMA Transfer done
0 = DMA buffer transfer has not completed since the last read of HSMCI_SR register.
1 = DMA buffer transfer has completed.
• FIFOEMPTY: FIFO empty flag
0 = FIFO contains at least one byte.
1 = FIFO is empty.
• XFRDONE: Transfer Done flag
0 = A transfer is in progress.
1 = Command register is ready to operate and the data bus is in the idle state.
• ACKRCV: Boot Operation Acknowledge Received
0 = No Boot acknowledge received since the last read of the status register.
1 = A Boot acknowledge signal has been received. Cleared by reading the HSMCI_SR register.
• ACKRCVE: Boot Operation Acknowledge Error
0 = No error
1 = Corrupted Boot Acknowledge signal received.
• OVRE: Overrun
0 = No error.
1 = At least one 8-bit received data has been lost (not read). Cleared when sending a new data transfer command.
When
FERRCTRL in HSMCI_CFG is set to 1, OVRE becomes reset after read.
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6438F–ATARM–21-Jun-10