AT91SAM9G45-CU-999 Atmel, AT91SAM9G45-CU-999 Datasheet - Page 445
![IC MCU ARM9 APMC 324TFBGA](/photos/12/13/121367/324-tfbga-pkg_sml.jpg)
AT91SAM9G45-CU-999
Manufacturer Part Number
AT91SAM9G45-CU-999
Description
IC MCU ARM9 APMC 324TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91SAM9G45-EKES.pdf
(1218 pages)
Specifications of AT91SAM9G45-CU-999
Core Processor
ARM9
Core Size
16/32-Bit
Speed
400MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
64KB (64K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 1.1 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- Current page: 445 of 1218
- Download datasheet (19Mb)
29.8.5
Name:
Addresses:
Access:
• RDRF: Receive Data Register Full
0 = No data has been received since the last read of SPI_RDR
1 = Data has been received and the received data has been transferred from the serializer to SPI_RDR since the last read
of SPI_RDR.
• TDRE: Transmit Data Register Empty
0 = Data has been written to SPI_TDR and not yet transferred to the serializer.
1 = The last data written in the Transmit Data Register has been transferred to the serializer.
TDRE equals zero when the SPI is disabled or at reset. The SPI enable command sets this bit to one.
• MODF: Mode Fault Error
0 = No Mode Fault has been detected since the last read of SPI_SR.
1 = A Mode Fault occurred since the last read of the SPI_SR.
• OVRES: Overrun Error Status
0 = No overrun has been detected since the last read of SPI_SR.
1 = An overrun has occurred since the last read of SPI_SR.
An overrun occurs when SPI_RDR is loaded at least twice from the serializer since the last read of the SPI_RDR.
• ENDRX: End of RX buffer
0 = The Receive Counter Register has not reached 0 since the last write in SPI_RCR
1 = The Receive Counter Register has reached 0 since the last write in SPI_RCR
• ENDTX: End of TX buffer
0 = The Transmit Counter Register has not reached 0 since the last write in SPI_TCR
1 = The Transmit Counter Register has reached 0 since the last write in SPI_TCR
• RXBUFF: RX Buffer Full
0 = SPI_RCR
1 = Both SPI_RCR
6438F–ATARM–21-Jun-10
31
23
15
–
–
–
7
–
SPI Status Register
(1)
or SPI_RNCR
(1)
and SPI_RNCR
30
22
14
SPI_SR
0xFFFA4010 (0), 0xFFFA8010 (1)
Read-only
–
–
–
6
–
(1)
has a value other than 0.
29
21
13
(1)
–
–
–
5
–
have a value of 0.
28
20
12
–
–
–
4
–
OVRES
27
19
11
–
–
–
3
MODF
(1)
(1)
26
18
10
–
–
–
2
or SPI_RNCR
or SPI_TNCR
(1)
(1)
or SPI_RNCR
or SPI_TNCR
AT91SAM9G45
TXEMPTY
TDRE
(1)
(1)
25
17
–
–
9
1
.
.
(1)
(1)
.
.
SPIENS
NSSR
RDRF
24
16
–
8
0
445
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