AT91SAM9G45-CU-999 Atmel, AT91SAM9G45-CU-999 Datasheet - Page 43

• Manufacturer Part Number: AT91SAM9G45-CU-999
• Description: IC MCU ARM9 APMC 324TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9G45-CU-999

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 400MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 1.1 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

9.5.1
• CRm[3:0]: Specified Coprocessor Action
Determines specific coprocessor action. Its value is dependent on the CP15 register used. For details, refer to CP15 spe-
cific register behavior.
• opcode_2[7:5]
Determines specific coprocessor operation code. By default, set to 0.
• Rd[15:12]: ARM Register
Defines the ARM register whose value is transferred to the coprocessor. If R15 is chosen, the result is unpredictable.
• CRn[19:16]: Coprocessor Register
Determines the destination coprocessor register.
• L: Instruction Bit
0 = MCR instruction
1 = MRC instruction
• opcode_1[23:20]: Coprocessor Code
Defines the coprocessor specific code. Value is c15 for CP15.
• cond [31:28]: Condition
For more details, see Chapter 2 in ARM926EJ-S TRM.
6438F–ATARM–21-Jun-10
31
23
15
7
CP15 Registers Access
opcode_1
opcode_2
30
22
14
6
CP15 registers can only be accessed in privileged mode by:
Other instructions like CDP, LDC, STC can cause an undefined instruction exception.
The assembler code for these instructions is:
The MCR, MRC instructions bit pattern is shown below:
• MCR (Move to Coprocessor from ARM Register) instruction is used to write an ARM register
• MRC (Move to ARM Register from Coprocessor) instruction is used to read the value of
cond
Rd
to CP15.
CP15 to an ARM register.
MCR/MRC{cond} p15, opcode_1, Rd, CRn, CRm, opcode_2.
29
21
13
5
28
20
12
L
4
1
27
19
11
1
1
3
26
18
10
1
1
2
CRm
CRn
AT91SAM9G45
25
17
1
1
9
1
24
16
0
1
8
0
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