AT91SAM9G45-CU-999 Atmel, AT91SAM9G45-CU-999 Datasheet - Page 1083

• Manufacturer Part Number: AT91SAM9G45-CU-999
• Description: IC MCU ARM9 APMC 324TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9G45-CU-999

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 400MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 1.1 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

43.8.14
Register Name:AC97C_SR
Address:
Access Type: Read-only
WKUP and SOF flags in AC97C_SR register are automatically cleared by a processor read operation.
• SOF: Start Of Frame
0: No Start of Frame has been detected since the last read of the Status Register.
1: At least one Start of frame has been detected since the last read of the Status Register.
• WKUP: Wake Up detection
0: No Wake-up has been detected.
1: At least one rising edge on SDATA_IN has been asynchronously detected. That means AC97 Codec has notified a
wake-up.
• COEVT: CODEC Channel Event
A Codec channel event occurs when AC97C_COSR AND AC97C_COMR is not 0. COEVT flag is automatically cleared
when the channel event condition is cleared.
0: No event on the CODEC channel has been detected since the last read of the Status Register.
1: At least one event on the CODEC channel is active.
• CAEVT: Channel A Event
A channel A event occurs when AC97C_CASR AND AC97C_CAMR is not 0. CAEVT flag is automatically cleared when the
channel event condition is cleared.
0: No event on the channel A has been detected since the last read of the Status Register.
1: At least one event on the channel A is active.
• CBEVT: Channel B Event
A channel B event occurs when AC97C_CBSR AND AC97C_CBMR is not 0. CBEVT flag is automatically cleared when the
channel event condition is cleared.
0: No event on the channel B has been detected since the last read of the Status Register.
1: At least one event on the channel B is active.
1083
31
23
15
–
–
–
7
–
AT91SAM9G45
AC97 Controller Status Register
0xFFFAC050
30
22
14
–
–
–
6
–
29
21
13
–
–
–
5
CBEVT
28
20
12
–
–
–
4
CAEVT
27
19
11
–
–
–
3
COEVT
26
18
10
–
–
–
2
WKUP
25
17
–
–
9
–
1
6438F–ATARM–21-Jun-10
SOF
24
16
–
–
8
–
0