AT91SAM9G45-CU-999 Atmel, AT91SAM9G45-CU-999 Datasheet - Page 272

• Manufacturer Part Number: AT91SAM9G45-CU-999
• Description: IC MCU ARM9 APMC 324TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9G45-CU-999

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 400MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 1.1 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

22.7.9
Name:
Access:
Reset:
The DLL logic is internally used by the controller in order to delay DQS inputs. This is necessary to center the strobe time
and the data valid window.
• MDINC: DLL Master Delay Increment
0 = The DLL is not incrementing the Master delay counter.
1 = The DLL is incrementing the Master delay counter.
• MDDEC: DLL Master Delay Decrement
0 = The DLL is not decrementing the Master delay counter.
1 = The DLL is decrementing the Master delay counter.
• MDOVF
0 = The Master delay counter has not reached its maximum value, or the Master is not locked yet.
1 = The Master delay counter has reached its maximum value, the Master delay counter increment is stopped and the DLL
forces the Master lock. If this flag is set, it means the DDRSDRC clock frequency is too low compared to Master delay line
number of elements.
• MDVAL
Value of the Master delay counter.
6438F–ATARM–21-Jun-10
31
23
15
–
–
7
–
:
:
DDRSDRC DLL Register
DLL Master Delay Value
DLL Master Delay Overflow Flag
DDRSDRC_DLL
Read-only
See
Table 22-9
30
22
14
–
–
6
–
29
21
13
–
–
5
–
28
20
12
–
–
4
–
MDVAL
27
19
11
–
–
3
–
MDOVF
26
18
10
–
–
2
AT91SAM9G45
MDDEC
25
17
–
–
9
1
MDINC
24
16
–
–
8
0
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