AT91SAM9G45-CU-999 Atmel, AT91SAM9G45-CU-999 Datasheet - Page 1123
AT91SAM9G45-CU-999
Manufacturer Part Number
AT91SAM9G45-CU-999
Description
IC MCU ARM9 APMC 324TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91SAM9G45-EKES.pdf
(1218 pages)
Specifications of AT91SAM9G45-CU-999
Core Processor
ARM9
Core Size
16/32-Bit
Speed
400MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
64KB (64K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 1.1 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
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6438F–ATARM–21-Jun-10
The above configuration can be changed frame to frame, so the displayed window can be
moved rapidly. Note that the FRMSIZE field of DMAFRMCFG register must be updated with any
movement of the displaying window. Note also that the software must write bit DMAUPDT in
DMACON register after each configuration for it to be accepted by LCDC.
Note:
• Define the width of the complete frame buffer by programming in the field ADDRINC of
• Enable the 2D addressing mode by writing the DMA2DEN bit in DMACON register. If this bit
DMA2DCFG register the address increment between the last word of a line and the first word
of the next line (in number of 32-bit words).
is not activated, the values in the DMA2DCFG register are not considered and the controller
assumes that the displayed area occupies a continuous portion of the memory.
In 24 bpp packed mode, the DMA base address must point to a word containing a complete pixel
(possible values of PIXELOFF are 0 and 8). This means that the horizontal origin of the displaying
window must be a multiple of 4 pixels or a multiple of 4 pixels minus 1 (x = 4n or x = 4n-1, valid ori-
gins are pixel 0,3,4,7,8,11,12, etc.).
AT91SAM9G45
1123
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