ATMEGA32HVB-8X3 Atmel, ATMEGA32HVB-8X3 Datasheet - Page 76

MCU AVR 32KB FLASH 8MHZ 44TSSOP

ATMEGA32HVB-8X3

Manufacturer Part Number
ATMEGA32HVB-8X3
Description
MCU AVR 32KB FLASH 8MHZ 44TSSOP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA32HVB-8X3

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI
Peripherals
POR, WDT
Number Of I /o
17
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 25 V
Data Converters
A/D 7x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TSSOP
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SPI, TWI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
17
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRSB200
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 7 Channel
Package
44TSSOP
Device Core
AVR
Family Name
ATmega
Maximum Speed
8 MHz
Operating Supply Voltage
5|9|12|15|18|24 V
For Use With
ATSTK524 - KIT STARTER ATMEGA32M1/MEGA32C1ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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ATmega16HVB/32HVB
• MOSI/PCINT10 – Port B, Bit6
MOSI, SPI Master Data output: Slave Data input for SPI channel. When the SPI is enabled as a
Slave, this pin is configured as an input regardless of the setting of DDB6. When the SPI is
enabled as a Master, the data direction of this pin is controlled by DDB6. When the pin is forced
by the SPI to be an input, the pull-up can still be controlled by the PORTB6 bit. When not operat-
ing in SPI mode, this pin can serve as an external interrupt source.
PCINT10: Pin Change Interrupt 10. This pin can serve as external interrupt source.
• SCK/PCINT9 – Port B, Bit5
SCK, Master Clock output: Slave Clock input pin for SPI channel. When the SPI is enabled as a
Slave, this pin is configured as an input regardless of the setting of DDB5. When the SPI is
enabled as a Master, the data direction of this pin is controlled by DDB5. When the pin is forced
by the SPI to be an input, the pull-up can still be controlled by the PORTB5 bit.
PCINT9: Pin Change Interrupt 9. This pin can serve as external interrupt source.
• SS/PCINT8 – Port B, Bit4
SS, Slave Select input: When the SPI is enabled as a Slave, this pin is configured as an input
regardless of the setting of DDB4. As a Slave, the SPI is activated when this pin is driven low.
When the SPI is enabled as a Master, the data direction of this pin is controlled by DDB4. When
the pin is forced by the SPI to be an input, the pull-up can still be controlled by the PORTB4 bit.
When not operating in SPI mode, this pin can serve as Clock Output, CPU Clock divided by 2.
See ”Clock Output” on page 28.
PCINT8: Pin Change Interrupt 8. This pin can serve as external interrupt source.
• PCINT7 – Port B, Bit3
PCINT7: Pin Change Interrupt 7. This pin can serve as external interrupt source.
• PCINT6 – Port B, Bit2
PCINT6: Pin Change Interrupt 6. This pin can serve as external interrupt source.
• CKOUT/PCINT5 – Port B, Bit1
CKOUT: Clock output. This pin can serve as clock output pin.
PCINT5: Pin Change Interrupt 5. This pin can serve as external interrupt source.
• ICP00/PCINT4 – Port B, Bit0
ICP00: Input Capture Timer/Counter0. This pin can serve as Input Capture Trigger for
Timer/Counter0
PCINT4: Pin Change Interrupt 4. This pin can serve as external interrupt source.
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