DSPIC33EP128MC504-I/PT Microchip Technology, DSPIC33EP128MC504-I/PT Datasheet - Page 371

• Manufacturer Part Number: DSPIC33EP128MC504-I/PT
• Description: Digital Signal Processors & Controllers - DSP, DSC 16B 128KB FL 16KBR 60MHz 44P OpAmps
• Manufacturer: Microchip Technology
• Type: dsPIC33E/PIC24Er

Specifications of DSPIC33EP128MC504-I/PT

• Rohs: yes
• Core: dsPIC33E
• Data Bus Width: 16 bit
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Maximum Clock Frequency: 7.37 MHz, 32 kHz
• Number Of Programmable I/os: 35
• Number Of Timers: 5 x 16-bit, 2 x 32-bit
• Device Million Instructions Per Second: 70 MIPs
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Package / Case: TQFP-44
• Mounting Style: SMD/SMT
• Family / Core: dsPIC33E/PIC24E
• Interface Type: CAN, I2C, SPI, UART
• Minimum Operating Temperature: - 40 C
• On-chip Adc: Yes
• Product: DSPs
• Program Memory Type: Flash
• Supply Current: 10 mA

26.3
REGISTER 26-1:
 2011-2012 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12-8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
CRCFUL
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
CRCEN
R/W-0
R-0
Programmable CRC Registers
CRCEN: CRC Enable bit
1 = CRC module is enabled
0 = CRC module is disabled. All state machines, pointers, and CRCWDAT/CRCDAT are reset. Other
Unimplemented: Read as ‘0’
CSIDL: CRC Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
VWORD<4:0>: Pointer Value bits
Indicates the number of valid words in the FIFO. Has a maximum value of 8 when PLEN<4:0> > 7,
or 16 when PLEN<4:0>
CRCFUL: FIFO Full bit
1 = FIFO is full
0 = FIFO is not full
CRCMPT: FIFO Empty Bit
1 = FIFO is empty
0 = FIFO is not empty
CRCISEL: CRC Interrupt Selection bit
1 = Interrupt on FIFO empty; final word of data is still shifting through CRC
0 = Interrupt on shift complete and CRCWDAT results ready
CRCGO: Start CRC bit
1 = Start CRC serial shifter
0 = CRC serial shifter is turned off
LENDIAN: Data Word Little-Endian Configuration bit
1 = Data word is shifted into the CRC starting with the LSb (little endian)
0 = Data word is shifted into the CRC starting with the MSb (big endian)
Unimplemented: Read as ‘0’
CRCMPT
SFRs are not reset.
U-0
R-1
—
CRCCON1: CRC CONTROL REGISTER 1
W = Writable bit
‘1’ = Bit is set
CRCISEL
CSIDL
R/W-0
R/W-0


7.
CRCGO
R/W-0
R-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
LENDIAN
R/W-0
R-0
VWORD<4:0>
R-0
U-0
—
x = Bit is unknown
R-0
U-0
—
DS70657F-page 371
R-0
U-0
—
bit 8
bit 0