DSPIC33EP128MC504-I/PT Microchip Technology, DSPIC33EP128MC504-I/PT Datasheet - Page 114

• Manufacturer Part Number: DSPIC33EP128MC504-I/PT
• Description: Digital Signal Processors & Controllers - DSP, DSC 16B 128KB FL 16KBR 60MHz 44P OpAmps
• Manufacturer: Microchip Technology
• Type: dsPIC33E/PIC24Er

Specifications of DSPIC33EP128MC504-I/PT

• Rohs: yes
• Core: dsPIC33E
• Data Bus Width: 16 bit
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Maximum Clock Frequency: 7.37 MHz, 32 kHz
• Number Of Programmable I/os: 35
• Number Of Timers: 5 x 16-bit, 2 x 32-bit
• Device Million Instructions Per Second: 70 MIPs
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Package / Case: TQFP-44
• Mounting Style: SMD/SMT
• Family / Core: dsPIC33E/PIC24E
• Interface Type: CAN, I2C, SPI, UART
• Minimum Operating Temperature: - 40 C
• On-chip Adc: Yes
• Product: DSPs
• Program Memory Type: Flash
• Supply Current: 10 mA

dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
4.8
The dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/
50X, and PIC24EPXXXGP/MC20X architecture uses a
24-bit-wide program space and a 16-bit-wide data
space. The architecture is also a modified Harvard
scheme, meaning that data can also be present in the
program space. To use this data successfully, it must
be accessed in a way that preserves the alignment of
information in both spaces.
Aside from normal execution, the architecture of the
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X,
and PIC24EPXXXGP/MC20X devices provides two
methods by which program space can be accessed
during operation:
• Using table instructions to access individual bytes
• Remapping a portion of the program space into
TABLE 4-65:
FIGURE 4-22:
DS70657F-page 114
Instruction Access
(Code Execution)
TBLRD/TBLWT
(Byte/Word Read/Write)
or words anywhere in the program space
the data space (Program Space Visibility)
Note 1: The Least Significant bit (LSb) of program space addresses is always fixed as ‘0’ to maintain word
Access Type
Interfacing Program and Data
Memory Spaces
Program Counter
Table Operations
2: Table operations are not required to be word aligned. Table read operations are permitted in the
alignment of data in the program and data spaces.
configuration memory space.
PROGRAM SPACE ADDRESS CONSTRUCTION
DATA ACCESS FROM PROGRAM SPACE ADDRESS GENERATION
(2)
(1)
User
User
Configuration
User/Configuration
Access
Space Select
Space
1/0
0
TBLPAG
8 bits
<23>
0
TBLPAG<7:0>
TBLPAG<7:0>
0xxx xxxx
1xxx xxxx
0xx
Program Counter
Table instructions allow an application to read or write
to small areas of the program memory. This capability
makes the method ideal for accessing data tables that
need to be updated periodically. It also allows access
to all bytes of the program word. The remapping
method allows an application to access a large block of
data on a read-only basis, which is ideal for look-ups
from a large table of static data. The application can
only access the least significant word of the program
word.
<22:16>
24 bits
xxxx
23 bits
Program Space Address
xxxx
PC<22:1>
xxxx xxxx xxxx xxxx
xxxx xxxx xxxx xxxx
16 bits
<15>
 2011-2012 Microchip Technology Inc.
EA
xxxx
Data EA<15:0>
Data EA<15:0>
xxxx xxx0
<14:1>
Byte Select
1/0
0
<0>
0