DSPIC33EP128MC504-I/PT Microchip Technology, DSPIC33EP128MC504-I/PT Datasheet - Page 267

• Manufacturer Part Number: DSPIC33EP128MC504-I/PT
• Description: Digital Signal Processors & Controllers - DSP, DSC 16B 128KB FL 16KBR 60MHz 44P OpAmps
• Manufacturer: Microchip Technology
• Type: dsPIC33E/PIC24Er

Specifications of DSPIC33EP128MC504-I/PT

• Rohs: yes
• Core: dsPIC33E
• Data Bus Width: 16 bit
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Maximum Clock Frequency: 7.37 MHz, 32 kHz
• Number Of Programmable I/os: 35
• Number Of Timers: 5 x 16-bit, 2 x 32-bit
• Device Million Instructions Per Second: 70 MIPs
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Package / Case: TQFP-44
• Mounting Style: SMD/SMT
• Family / Core: dsPIC33E/PIC24E
• Interface Type: CAN, I2C, SPI, UART
• Minimum Operating Temperature: - 40 C
• On-chip Adc: Yes
• Product: DSPs
• Program Memory Type: Flash
• Supply Current: 10 mA

18.1
1.
2.
3.
4.
To avoid invalid slave read data to the master, the
user’s master software must guarantee enough time for
slave software to fill its write buffer before the user
application initiates a master write/read cycle. It is
always advisable to preload the SPIxBUF transmit reg-
ister in advance of the next master transaction cycle.
SPIxBUF is transferred to the SPI shift register and is
empty once the data transmission begins.
 2011-2012 Microchip Technology Inc.
Note:
Note:
Note:
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
In Frame mode, if there is a possibility that the
master may not be initialized before the slave:
a)
b)
In non-framed 3-wire mode, (i.e., not using SSx
from a master):
a)
b)
FRMEN (SPIxCON2<15>) = 1 and SSEN
(SPIxCON1<7>) = 1 are exclusive and invalid.
In Frame mode, SCKx is continuous and the
Frame sync pulse is active on the SSx pin,
which indicates the start of a data frame.
In Master mode only, set the SMP bit
(SPIxCON1<9>) to a ‘1’ for the fastest SPI data
rate possible. The SMP bit can only be set at the
same
(SPIxCON1<5>) is set.
SPI Helpful Tips
If FRMPOL (SPIxCON2<13>) = 1, use a
pull-down resistor on SSx.
If FRMPOL = 0, use a pull-up resistor on
SSx.
If CKP (SPIxCON1<6>) = 1, always place a
pull-up resistor on SSx.
If CKP = 0, always place a pull-down
resistor on SSx.
This
transmission after initialization is not
shifted or corrupted.
This will insure that during power-up and
initialization the master/slave will not lose
sync due to an errant SCK transition that
would cause the slave to accumulate data
shift errors for both transmit and receive
appearing as corrupted data.
Not all third-party devices support Frame
mode
specifications in
Characteristics”
time
insures
or
timing.
after
Section 30.0 “Electrical
that
for details.
Refer
the
the
to
MSTEN
first
the
frame
SPI
bit
18.2
Many useful resources are provided on the main prod-
uct page of the Microchip web site for the devices listed
in this data sheet. This product page, which can be
accessed using this link, contains the latest updates
and additional information.
18.2.1
• Section 18. “Serial Peripheral Interface”
• Code Samples
• Application Notes
• Software Libraries
• Webinars
• All related dsPIC33E/PIC24E Family Reference
• Development Tools
Note:
(DS70569)
Manuals Sections
SPI Resources
In the event you are not able to access the
product page using the link above, enter
this URL in your browser:
http://www.microchip.com/wwwproducts/
Devices.aspx?dDocName=en555464
KEY RESOURCES
DS70657F-page 267