DSPIC33EP128MC504-I/PT Microchip Technology, DSPIC33EP128MC504-I/PT Datasheet - Page 225

• Manufacturer Part Number: DSPIC33EP128MC504-I/PT
• Description: Digital Signal Processors & Controllers - DSP, DSC 16B 128KB FL 16KBR 60MHz 44P OpAmps
• Manufacturer: Microchip Technology
• Type: dsPIC33E/PIC24Er

Specifications of DSPIC33EP128MC504-I/PT

• Rohs: yes
• Core: dsPIC33E
• Data Bus Width: 16 bit
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Maximum Clock Frequency: 7.37 MHz, 32 kHz
• Number Of Programmable I/os: 35
• Number Of Timers: 5 x 16-bit, 2 x 32-bit
• Device Million Instructions Per Second: 70 MIPs
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Package / Case: TQFP-44
• Mounting Style: SMD/SMT
• Family / Core: dsPIC33E/PIC24E
• Interface Type: CAN, I2C, SPI, UART
• Minimum Operating Temperature: - 40 C
• On-chip Adc: Yes
• Product: DSPs
• Program Memory Type: Flash
• Supply Current: 10 mA

16.0
The
PIC24EPXXXMC20X devices support a dedicated
Pulse-Width Modulation (PWM) module with up to 6
outputs.
The High-Speed PWM module consists of the following
major features:
• Three PWM generators
• Two PWM outputs per PWM generator
• Individual period and duty cycle for each PWM pair
• Duty cycle, dead time, phase shift and frequency
• Independent Fault and current-limit inputs for six
• Redundant output
• Center-Aligned PWM mode
• Output override control
• Chop mode (also known as Gated mode)
• Special Event Trigger
• Prescaler for input clock
• PWMxL and PWMxH output pin swapping
• Independent PWM frequency, duty cycle and
• Dead-time compensation
• Enhanced Leading-Edge Blanking (LEB)
• Frequency resolution enhancement
• PWM capture functionality
 2011-2012 Microchip Technology Inc.
resolution of 8.32 ns
PWM outputs
phase shift changes for each PWM generator
functionality
Note 1: This data sheet summarizes the features
Note:
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
2: Some registers and associated bits
HIGH-SPEED PWM MODULE
(dsPIC33EPXXXMC20X/50X
and PIC24EPXXXMC20X
DEVICES ONLY)
In Edge-Aligned PWM mode, the duty
cycle,
frequency resolution are 8.32 ns.
of
dsPIC33EPXXXMC20X/50X,
PIC24EPXXXGP/MC20X
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 14. “High-Speed
PWM” (DS70645) of the “dsPIC33E/
PIC24E
which is available from the Microchip web
site (www.microchip.com).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
dsPIC33EPXXXMC20X/50X
the
dead-time,
Family Reference Manual”,
dsPIC33EPXXXGP50X,
phase
families
shift
and
and
and
of
in
The High-Speed PWM module contains up to three
PWM generators. Each PWM generator provides two
PWM outputs: PWMxH and PWMxL
base generator provides a synchronous signal as a
common time base to synchronize the various PWM
outputs. The individual PWM outputs are available on
the output pins of the device. The input Fault signals
and current-limit signals, when enabled, can monitor
and protect the system by placing the PWM outputs
into a known “safe” state.
Each PWM can generate a trigger to the ADC module
to sample the analog signal at a specific instance dur-
ing the PWM period. In addition, the High-Speed PWM
module also generates a Special Event Trigger to the
ADC module based on either of the two master time
bases.
The High-Speed PWM module can synchronize itself
with an external signal or can act as a synchronizing
source to any external device. The SYNCI1 input pin
that utilizes PPS, can synchronize the High-Speed
PWM module with an external signal. The SYNCO1 pin
is an output pin that provides a synchronous signal to
an external device.
Figure 16-1
High-Speed PWM module and its interconnection with
the CPU and other peripherals.
16.1
The PWM module incorporates multiple external Fault
inputs to include FLT1 and FLT2, which are re-
mappable using the PPS feature, FLT3 and FLT4,
which are available only on the larger 44-pin and 64-pin
packages, and FLT32, which has been implemented
with Class B safety features, and is available on a fixed
pin
PIC24EPXXXMC20X devices.
These faults provide a safe and reliable way to safely
shut down the PWM outputs when the Fault input is
asserted.
16.1.1
During any reset event, the PWM module maintains
ownership of the Class B fault FLT32. At reset, this fault
is enabled in latched mode to guarantee the fail-safe
power-up of the application. The application software
must clear the PWM fault before enabling the High-
Speed Motor Control PWM module. To clear the fault
condition, the FLT32 pin must first be pulled low
externally or the internal pull down resistor in the
CNPDx register can be enabled.
Note:
on
PWM Faults
PWM FAULTS AT RESET
The Fault mode may be changed using
the FLTMOD<1:0> bits (FCLCON<1:0>)
regardless of the state of FLT32.
illustrates an architectural overview of the
all
dsPIC33EPXXXMC20X/50X
DS70657F-page 225
.
The master time
and