AM79C978 Advanced Micro Devices, AM79C978 Datasheet - Page 163

• Manufacturer Part Number: AM79C978
• Description: Single-Chip 1/10 Mbps PCI Home Networking Controller
• Manufacturer: Advanced Micro Devices

BCR22: PCI Latency Register
Note: Bits 15-0 in this register are programmable
through the EEPROM.
Bit
31-16 RES
15-8
7-0
MAX_LAT
MIN_GNT
Name
SWSTYLE
All Other
[7:0]
00h
01h
02h
03h
Reserved locations. Written as
zeros and read as undefined.
Maximum Latency. Specifies the
maximum arbitration latency the
Am79C978 controller can sustain
without causing problems to the
network activity. The register val-
ue specifies the time in units of 1/
4 microseconds. MAX_LAT is
aliased to the PCI configuration
space register MAX_LAT (offset
3Fh). The host will use the value
in the register to determine the
setting of the Am79C978 Latency
Timer register.
Minimum Grant. Specifies the
minimum length of a burst period
the Am79C978 controller needs
to keep up with the network activ-
Read/Write accessible only when
either the STOP or the SPND bit
is set. The SWSTYLE register will
Read accessible always; write
accessible only when either the
STOP or the SPND bit is set.
MAX_LAT is set to the value of
FFh by H_RESET which results
in a default maximum latency of
63.75 microseconds. It is recom-
mended to program the value of
18h via EEPROM. MAX_LAT is
not affected by S_RESET or
STOP.
Description
PCnet-PCI
PCnet-PCI
PCnet-ISA
controller
controller
controller
LANCE/
Name
Style
RES
RES
Table 40. Software Styles
Undefined
Am79C978
SSIZE32
0
1
1
1
BCR23: PCI Subsystem Vendor ID Register
Note: Bits 15-0 in this register are programmable
through the EEPROM.
Bit
16-bit software
structures, non-burst or
burst access
RES
32-bit software
structures, non-burst or
burst access
32-bit software
structures, non-burst or
burst access
Undefined
Name
Initialization Block
Entries
contain the value 00h following
H_RESET and will be unaffected
by S_RESET or STOP.
ity. The length of the burst period
is calculated assuming a clock
rate of 33 MHz. The register val-
ue specifies the time in units of 1/
4 ms. MIN_GNT is aliased to the
PCI Configuration Space register
MIN_GNT (offset 3Eh). The host
will use the value in the register to
determine the setting of the
Am79C978 Latency Timer regis-
ter.
Read accessible always; write
accessible only when either the
STOP or the SPND bit is set.
MIN_GNT is set to the value of
06h by H_RESET which results
in a default minimum grant of
1.5 ms, which is the time it takes
to Am79C978 controller to read/
write half of the FIFO. (16 DWord
transfers in burst mode with one
extra wait state per data phase
inserted by the target.) Note that
the default is only a typical value.
It also does not take into account
any descriptor accesses. It is rec-
ommended to program the value
of 18h via EEPROM. MIN_GNT
is not affected by S_RESET or
STOP.
Description
16-bit software structures,
non-burst access only
RES
32-bit software structures,
non-burst access only
32-bit software structures,
non-burst or burst access
Undefined
Descriptor Ring Entries
163