H27UAG8T2ATR-BC HYNIX SEMICONDUCTOR, H27UAG8T2ATR-BC Datasheet - Page 38

58T1891

H27UAG8T2ATR-BC

Manufacturer Part Number
H27UAG8T2ATR-BC
Description
58T1891
Manufacturer
HYNIX SEMICONDUCTOR
Datasheet

Specifications of H27UAG8T2ATR-BC

Memory Type
Flash - NAND
Memory Size
16Gbit
Memory Configuration
2048M X 8
Supply Voltage Range
2.7V To 3.6V
Memory Case Style
TSOP
No. Of Pins
48
Operating Temperature Range
0°C To +70°C
Rohs Compliant
Yes

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Rev 1.0 / Aug. 2010
4. DEVICE OPERATION
4.1. Page Read
This operation is initialized by 00h-30h to the command register along with followed by five address input cycles. The
8,640 bytes of data within the selected page are transferred to the data registers in less than 200㎲(t
controller may detect the completion of this data transfer 200㎲(t
data in a page is loaded into the data registers, they may be read out in 25㎱ cycle time by sequentially pulsing RE#.
The repetitive high to low transitions of the RE# clock make the device output the data starting from the selected col-
umn address up to the last column address.
The device may output random data in a page instead of the consecutive sequential data by writing random data out-
put command. The column address of next data, which is going to be out, may be changed to the address, which fol-
lows random data output command. Random data output can be operated multiple times, regardless of how many
times it is done in a page.
Random data output
Random data output operation changes the column address from which data is being read in the page register. Ran-
dom data output only is issued in Ready state. Refer to Figure 33.
Figure 32. Page read
Figure 33. Random data output
CLE
CE#
ALE
WE#
R/B#
RE#
R/B#
RE#
I/Ox
I/Ox
00h
00h
Address
(5 cycle)
Address (5 cycle)
30h
t R
Data
30h
Output
R
) by analyzing the output of R/B# pin. Once the
16Gb (2048M x 8bit) NAND Flash
t R
05h
Address
(2 cycle)
Data Output
H27UAG8T2B Series
E0h
(Serial Access)
R
Data
). The system
Release
Output
38

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