H27UAG8T2ATR-BC HYNIX SEMICONDUCTOR, H27UAG8T2ATR-BC Datasheet - Page 10

• Manufacturer Part Number: H27UAG8T2ATR-BC
• Description: 58T1891
• Manufacturer: HYNIX SEMICONDUCTOR

Specifications of H27UAG8T2ATR-BC

• Memory Type: Flash - NAND
• Memory Size: 16Gbit
• Memory Configuration: 2048M X 8
• Supply Voltage Range: 2.7V To 3.6V
• Memory Case Style: TSOP
• No. Of Pins: 48
• Operating Temperature Range: 0°C To +70°C
• Rohs Compliant: Yes

Rev 1.0 / Aug. 2010
1.7. Command Set
Notes:
PAGE READ
READ FOR COPY-BACK
RANDOM DATA OUTPUT
SINGLE/multi plane CACHE READ
SINGLE/multi plane CACHE READ
END
READ ID
READ STATUS REGISTER
PAGE PGM (start) / CACHE PGM
5)
RANDOM DATA INPUT
COPY-BACK PGM
CACHE PGM (start)
BLOCK ERASE
RESET
multi plane PAGE READ
multi plane CACHE READ START
multi plane READ FOR COPY-BACK
multi plane BLOCK ERASE
multi plane DATA OUTPUT
multi plane READ STATUS REGIS-
TER
multi plane PAGE PGM
/ multi plane CACHE PGM (end)
multi plane COPY-BACK PGM
multi plane CACHE PGM (start)
User OTP ENTRY COMMAND
Unique ID READ ENTRY COMMAND
Unique ID PGM ENTRY COMMAND
READ ID2 ENTRY COMMAND
1. Random Data Input/Output must be performed in a selected page.
2. Any command between 11h and 81h is prohibited except 70h, 78h, and FFh.
3. Multi Plane Random data-out must be used after Multi Plane read operations (Multi Plane Page Read, Multi Plane
4. Do not change Plane address order when using all Multi Plane operations.
5. All cache operation (cache program, cache read) is available only within a block.
6. Interleave operation between two chips are allowed. Multi Plane Read Status (78h) can be used to check each chip
(end)
Cache Read and Multi Plane Read for Copy Back).
status. It is prohibited to use Read Status command (70h) in interleaved operation.
5)
FUNCTION
5)
1)
1)
1) 3)
5)
5)
5)
Cycle
60h
60h
04h
02h
84h
1st
00h
00h
05h
31h
3Fh
90h
70h
80h
85h
85h
80h
FFh
60h
60h
60h
00h
78h
80h
85h
80h
30h
Number
Address
cycles
of
5
5
2
1
5
2
5
5
3
3
3
3
3
5
3
5
5
5
-
-
-
-
cycles
option
option
input
Data
Yes
Yes
Yes
Yes
Yes
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
11h~81h
11h~81h
11h~81h
16Gb (2048M x 8bit) NAND Flash
Cycle
2nd
D0h
30h
35h
E0h
10h
10h
15h
60h
60h
60h
60h
05h
19h
19h
97h
65h
2)
2)
2)
-
-
-
-
-
-
-
Number
Address
cycles
of
3
3
2
5
5
5
3
3
-
-
-
-
-
-
-
-
-
-
-
-
-
H27UAG8T2B Series
cycles
option
input
Data
Yes
Yes
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Cycle
30h/
D0h
3rd
30h
33h
35h
E0h
10h
10h
15h
08h
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Release
able com-
Accept-
during
mand
busy
Yes
Yes
Yes
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
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