MC9S12XDP512CAL Freescale, MC9S12XDP512CAL Datasheet - Page 997

MC9S12XDP512CAL

Manufacturer Part Number
MC9S12XDP512CAL
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9S12XDP512CAL

Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
32KB
# I/os (max)
91
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
On-chip Adc
2(16-chx10-bit)
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
112
Package Type
LQFP
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant

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IRQEN
Reset
Reset
IRQE
24.0.5.10 IRQ Control Register (IRQCR)
Read: See individual bit descriptions below.
Write: See individual bit descriptions below.
Field
24.0.5.11 Port K Data Register (PORTK)
Read: Anytime.
Write: Anytime.
7
6
W
W
R
R
IRQE
IRQ Select Edge Sensitive Only
Special modes: Read or write anytime.
Normal and emulation modes: Read anytime, write once.
0 IRQ configured for low level recognition.
1 IRQ configured to respond only to falling edges. Falling edges on the IRQ pin will be detected anytime
External IRQ Enable
Read or write anytime.
0 External IRQ pin is disconnected from interrupt logic.
1 External IRQ pin is connected to interrupt logic.
PK7
7
0
7
0
IRQE = 1 and will be cleared only upon a reset or the servicing of the IRQ interrupt.
= Unimplemented or Reserved
IRQEN
1
0
0
6
6
EDIV[1:0]
Table 24-13. Free-Running ECLK Clock Rate
Figure 24-13. Port K Data Register (PORTK)
Figure 24-12. IRQ Control Register (IRQCR)
00
01
10
11
Table 24-14. IRQCR Field Descriptions
PK5
5
0
0
5
0
ECLK = Bus clock rate
ECLK = Bus clock rate divided by 2
ECLK = Bus clock rate divided by 3
ECLK = Bus clock rate divided by 4
Rate of Free-Running ECLK
PK4
0
0
0
4
4
Description
PK3
3
0
0
3
0
PK2
0
0
0
2
2
PK1
1
0
0
1
0
PK0
0
0
0
0
0

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