MC9S12XDP512CAL Freescale, MC9S12XDP512CAL Datasheet - Page 86

• Manufacturer Part Number: MC9S12XDP512CAL
• Manufacturer: Freescale

Specifications of MC9S12XDP512CAL

• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 40MHz
• Interface Type: CAN/I2C/SCI/SPI
• Total Internal Ram Size: 32KB
• # I/os (max): 91
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/3.15V
• On-chip Adc: 2(16-chx10-bit)
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 112
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

Chapter 2 Clocks and Reset Generator (S12CRGV6)
2.3.2.3
This register is reserved for factory testing of the CRG module and is not available in normal modes.
Read: Always reads 0x_00 in normal modes
Write: Unimplemented in normal modes
2.3.2.4
This register provides CRG status bits and flags.
Read: Anytime
Write: Refer to each bit for individual write conditions
86
Reset
Reset
PORF
Field
RTIF
7
6
W
W
R
R
1. PORF is set to 1 when a power on reset occurs. Unaffected by system reset.
2. LVRF is set to 1 when a low-voltage reset occurs. Unaffected by system reset.
RTIF
Real Time Interrupt Flag — RTIF is set to 1 at the end of the RTI period. This flag can only be cleared by writing
a 1. Writing a 0 has no effect. If enabled (RTIE = 1), RTIF causes an interrupt request.
0 RTI time-out has not yet occurred.
1 RTI time-out has occurred.
Power on Reset Flag — PORF is set to 1 when a power on reset occurs. This flag can only be cleared by writing
a 1. Writing a 0 has no effect.
0 Power on reset has not occurred.
1 Power on reset has occurred.
Reserved Register (CTFLG)
CRG Flags Register (CRGFLG)
0
0
0
7
7
Writing to this register when in special mode can alter the CRG
fucntionality.
= Unimplemented or Reserved
= Unimplemented or Reserved
PORF
0
0
6
6
1
Figure 2-7. CRG Flags Register (CRGFLG)
Figure 2-6. Reserved Register (CTFLG)
Table 2-2. CRGFLG Field Descriptions
MC9S12XDP512 Data Sheet, Rev. 2.21
LVRF
0
0
5
5
2
LOCKIF
NOTE
0
0
0
4
4
Description
LOCK
0
0
0
3
3
TRACK
0
0
0
2
2
Freescale Semiconductor
SCMIF
0
0
0
1
1
SCM
0
0
0
0
0