MC9S12XDP512CAL Freescale, MC9S12XDP512CAL Datasheet - Page 451

MC9S12XDP512CAL

Manufacturer Part Number
MC9S12XDP512CAL
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9S12XDP512CAL

Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
32KB
# I/os (max)
91
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
On-chip Adc
2(16-chx10-bit)
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
112
Package Type
LQFP
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S12XDP512CAL
Manufacturer:
FREESCALE
Quantity:
1 928
Part Number:
MC9S12XDP512CAL
Manufacturer:
FREESCALE
Quantity:
4
Part Number:
MC9S12XDP512CAL
Manufacturer:
FREESCA
Quantity:
2 246
Part Number:
MC9S12XDP512CAL
Manufacturer:
FREESCALE
Quantity:
4 576
Part Number:
MC9S12XDP512CAL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC9S12XDP512CAL
Manufacturer:
FREESCALE
Quantity:
4 576
Freescale Semiconductor
ID[28:21]
ID[20:18]
ID[17:15]
ID[14:7]
Field
Field
Field
SRR
IDE
7:0
7:5
2:0
7:0
4
3
Reset:
Reset:
W
W
R
R
Extended Format Identifier — The identifiers consist of 29 bits (ID[28:0]) for the extended format. ID28 is the
most significant bit and is transmitted first on the CAN bus during the arbitration procedure. The priority of an
identifier is defined to be highest for the smallest binary number.
Extended Format Identifier — The identifiers consist of 29 bits (ID[28:0]) for the extended format. ID28 is the
most significant bit and is transmitted first on the CAN bus during the arbitration procedure. The priority of an
identifier is defined to be highest for the smallest binary number.
Substitute Remote Request — This fixed recessive bit is used only in extended format. It must be set to 1 by
the user for transmission buffers and is stored as received on the CAN bus for receive buffers.
ID Extended — This flag indicates whether the extended or standard identifier format is applied in this buffer. In
the case of a receive buffer, the flag is set as received and indicates to the CPU how to process the buffer
identifier registers. In the case of a transmit buffer, the flag indicates to the MSCAN what type of identifier to send.
0 Standard format (11 bit)
1 Extended format (29 bit)
Extended Format Identifier — The identifiers consist of 29 bits (ID[28:0]) for the extended format. ID28 is the
most significant bit and is transmitted first on the CAN bus during the arbitration procedure. The priority of an
identifier is defined to be highest for the smallest binary number.
Extended Format Identifier — The identifiers consist of 29 bits (ID[28:0]) for the extended format. ID28 is the
most significant bit and is transmitted first on the CAN bus during the arbitration procedure. The priority of an
identifier is defined to be highest for the smallest binary number.
ID20
ID14
x
x
7
Figure 10-27. Identifier Register 1 (IDR1) — Extended Identifier Mapping
7
Figure 10-28. Identifier Register 2 (IDR2) — Extended Identifier Mapping
Table 10-25. IDR0 Register Field Descriptions — Extended
Table 10-26. IDR1 Register Field Descriptions — Extended
Table 10-27. IDR2 Register Field Descriptions — Extended
ID19
ID13
6
x
6
x
MC9S12XDP512 Data Sheet, Rev. 2.21
ID18
ID12
5
x
5
x
Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV3)
SRR (=1)
ID11
4
x
4
x
Description
Description
Description
IDE (=1)
ID10
3
x
3
x
ID17
ID9
x
x
2
2
ID16
ID8
x
x
1
1
ID15
ID7
x
x
0
0
451

Related parts for MC9S12XDP512CAL