MC9S12XDP512CAL Freescale, MC9S12XDP512CAL Datasheet - Page 754

MC9S12XDP512CAL

Manufacturer Part Number
MC9S12XDP512CAL
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9S12XDP512CAL

Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
32KB
# I/os (max)
91
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
On-chip Adc
2(16-chx10-bit)
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
112
Package Type
LQFP
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S12XDP512CAL
Manufacturer:
FREESCALE
Quantity:
1 928
Part Number:
MC9S12XDP512CAL
Manufacturer:
FREESCALE
Quantity:
4
Part Number:
MC9S12XDP512CAL
Manufacturer:
FREESCA
Quantity:
2 246
Part Number:
MC9S12XDP512CAL
Manufacturer:
FREESCALE
Quantity:
4 576
Part Number:
MC9S12XDP512CAL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC9S12XDP512CAL
Manufacturer:
FREESCALE
Quantity:
4 576
Chapter 20 S12X Debug (S12XDBGV3) Module
20.3.2.5
Read: Anytime when unlocked and not secured and not armed.
Write: Aligned word writes when disarmed unlock the trace buffer for reading but do not affect trace buffer
contents.
756
Address: 0x0024, 0x0025
Bit[15:0]
Reset
Field
15–0
W
R
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9
15
X
Trace Buffer Data Bits — The Trace Buffer Register is a window through which the 64-bit wide data lines of the
Trace Buffer may be read 16 bits at a time. Each valid read of DBGTB increments an internal trace buffer pointer
which points to the next address to be read. When the ARM bit is written to 1 the trace buffer is locked to prevent
reading. The trace buffer can only be unlocked for reading by writing to DBGTB with an aligned word write when
the module is disarmed. The DBGTB register can be read only as an aligned word, any byte reads or misaligned
access of these registers will return 0 and will not cause the trace buffer pointer to increment to the next trace
buffer address. The same is true for word reads while the debugger is armed. System resets do not affect the
trace buffer contents. The POR state is undefined.
Debug Trace Buffer Register (DBGTBH:DBGTBL)
14
X
13
X
Figure 20-7. Debug Trace Buffer Register (DBGTB)
12
X
Table 20-16. DBGTB Field Descriptions
11
X
MC9S12XDP512 Data Sheet, Rev. 2.21
10
X
X
9
Bit 8
X
8
Description
Bit 7
X
7
Bit 6
X
6
Bit 5
X
5
Bit 4
X
4
Bit 3
X
3
Freescale Semiconductor
Bit 2
X
2
Bit 1
X
1
Bit 0
X
0

Related parts for MC9S12XDP512CAL