MC9S12XDP512CAL Freescale, MC9S12XDP512CAL Datasheet - Page 1163

MC9S12XDP512CAL

Manufacturer Part Number
MC9S12XDP512CAL
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9S12XDP512CAL

Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
32KB
# I/os (max)
91
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
On-chip Adc
2(16-chx10-bit)
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
112
Package Type
LQFP
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant

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All FDATAHI and FDATALO bits are readable but are not writable. At the completion of a data compress
operation, the resulting 16-bit signature is stored in the FDATA registers. The data compression signature
is readable in the FDATA registers until a new command write sequence is started.
28.3.2.11 RESERVED1
This register is reserved for factory testing and is not accessible.
All bits read 0 and are not writable.
28.3.2.12 RESERVED2
This register is reserved for factory testing and is not accessible.
All bits read 0 and are not writable.
28.3.2.13 RESERVED3
This register is reserved for factory testing and is not accessible.
Freescale Semiconductor
Reset
Reset
Reset
W
W
W
R
R
R
0
0
0
0
0
7
7
7
= Unimplemented or Reserved
= Unimplemented or Reserved
= Unimplemented or Reserved
0
0
0
0
0
6
6
6
Figure 28-19. Flash Data Low Register (FDATALO)
MC9S12XDP512 Data Sheet, Rev. 2.21
0
0
0
0
0
5
5
5
Figure 28-20. RESERVED1
Figure 28-21. RESERVED2
0
0
0
0
0
4
4
4
FDATALO
Chapter 28 256 Kbyte Flash Module (S12XFTX256K2V1)
0
0
0
0
0
3
3
3
0
0
0
0
0
2
2
2
0
0
0
0
0
1
1
1
0
0
0
0
0
0
0
0
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