MC9S12XDP512CAL Freescale, MC9S12XDP512CAL Datasheet - Page 177

• Manufacturer Part Number: MC9S12XDP512CAL
• Manufacturer: Freescale

Specifications of MC9S12XDP512CAL

• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 40MHz
• Interface Type: CAN/I2C/SCI/SPI
• Total Internal Ram Size: 32KB
• # I/os (max): 91
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/3.15V
• On-chip Adc: 2(16-chx10-bit)
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 112
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

5.3.2.10
This read-only register contains the conversion complete flags.
Read: Anytime
Write: Anytime, no effect
Freescale Semiconductor
CCF[7:0]
Reset
Field
7–0
W
R
CCF7
Conversion Complete Flag x (x = 7, 6, 5, 4, 3, 2, 1, 0) — A conversion complete flag is set at the end of each
conversion in a conversion sequence. The flags are associated with the conversion position in a sequence (and
also the result register number). Therefore, CCF0 is set when the first conversion in a sequence is complete and
the result is available in result register ATDDR0; CCF1 is set when the second conversion in a sequence is
complete and the result is available in ATDDR1, and so forth. A flag CCFx (x = 7, 6, 5, 4, 3, 2,1, 70) is cleared
when one of the following occurs:
In case of a concurrent set and clear on CCFx: The clearing by method A) will overwrite the set. The clearing by
methods B) or C) will be overwritten by the set.
0 Conversion number x not completed
1 Conversion number x has completed, result ready in ATDDRx
ATD Status Register 1 (ATDSTAT1)
0
7
A) Write to ATDCTL5 (a new conversion sequence is started)
B) If AFFC=0 and read of ATDSTAT1 followed by read of result register ATDDRx
C) If AFFC=1 and read of result register ATDDRx
= Unimplemented or Reserved
CCF6
0
6
Figure 5-12. ATD Status Register 1 (ATDSTAT1)
Table 5-20. ATDSTAT1 Field Descriptions
MC9S12XDP512 Data Sheet, Rev. 2.21
CCF5
0
5
CCF4
0
4
Description
Chapter 5 Analog-to-Digital Converter (S12ATD10B8CV2)
CCF3
0
3
CCF2
0
2
CCF1
0
1
CCF0
0
0
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