SAA7114HV2T NXP Semiconductors, SAA7114HV2T Datasheet - Page 98

• Manufacturer Part Number: SAA7114HV2T
• Manufacturer: NXP Semiconductors

Specifications of SAA7114HV2T

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Philips Semiconductors
Table 61:
Stop of VGATE pulse (HIGH-to-LOW transition), VGPS = 0; see
Table 62:
Table 63:
SAA7114_3
Product data sheet
Field
50 Hz
60 Hz
Bit
D7
D6
D2
D1
D0
Gain
255 (double amplitude) 0
128 (nominal level)
0 (off)
1st
2nd
1st
2nd
1st
2nd
1st
2nd
1st
2nd
1st
2nd
VGATE stop; 17h[1] and 16h[7:0]
Miscellaneous/VGATE MSBs; 17h[7:6] and 17h[2:0]
Raw data gain control; RAWG[7:0]18h[7:0]; see
10.2.23 Subaddress 16h
10.2.24 Subaddress 17h
10.2.25 Subaddress 18h
Description
LLC output enable
LLC2 output enable
alternative VGATE position
MSB VGATE stop
MSB VGATE start
Frame
line
counting
1
314
2
315
312
625
4
267
5
268
265
3
Control bits D7 to D0
RAWG7
0
0
Decimal
value
312
0...
...310
262
0...
...260
RAWG6
1
1
0
MSB
17h[1]
VSTO8 VSTO7 VSTO6 VSTO5 VSTO4 VSTO3 VSTO2 VSTO1 VSTO0
1
0
1
1
0
1
Symbol
LLCE
LLC2E
VGPS
VSTO8
VSTA8
Rev. 03 — 17 January 2006
RAWG5
1
0
0
Control bits D7 to D0
0
0
0
0
0
0
0
0
0
0
0
0
RAWG4
1
0
0
Figure 19
Value
0
1
0
1
0
1
see
see
Figure 24
Table 61
Table 60
1
0
1
0
0
0
Function
enable
3-state
enable
3-state
VGATE position according to
Table 61
VGATE occurs one line earlier during field 2
and
RAWG3
1
0
0
Figure
1
0
1
0
0
0
PAL/NTSC/SECAM video decoder
25.
RAWG2
1
0
0
1
0
0
0
0
0
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
0
0
1
1
0
1
RAWG1
1
0
0
SAA7114
Table 60
0
0
1
1
0
0
and
RAWG0
1
0
0
0
0
1
0
0
1
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