SAA7114HV2T NXP Semiconductors, SAA7114HV2T Datasheet - Page 96

• Manufacturer Part Number: SAA7114HV2T
• Manufacturer: NXP Semiconductors

Specifications of SAA7114HV2T

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Philips Semiconductors
SAA7114_3
Product data sheet
10.2.20 Subaddress 13h
Table 58:
Bit
D7
D6
D[5:4]
D3
D[2:0]
Description
RTCO output enable
X port XRH output
selection
X port XRV output
selection
horizontal lock
indicator selection
XPD7 to XPD0 (port
output format
selection); see
Section 9.4
RT/X port output control; 13h[7:0]
Rev. 03 — 17 January 2006
Symbol
RTCE
XRHS
XRVS[1:0] 00
HLSEL
OFTS[2:0] 000
Value Function
0
1
0
1
01
10
11
0
1
001
010
011
100
101
110
111
3-state
enabled
HREF (see
HS:
V123 (see
ITU 656 related field ID (see
and
inverted V123
inverted ITU 656 related field ID
copy of inverted HLCK status bit (default)
fast horizontal lock indicator (for special
applications only)
ITU 656
ITU 656 like format with modified field
blanking according to VGATE position
(programmable via
VSTA[8:0] 17h[0] 15h[7:0],
VSTO[8:0] 17h[1] 16h[7:0] and
VGPS[17h[2]])
Y-C
codes inserted)
reserved
multiplexed AD2/AD1 bypass (bits D8 to D1)
dependent on mode settings
(see
selected AD2 is output at CREF = 1 and AD1
is output at CREF = 0
multiplexed AD2/AD1 bypass (bits D7 to D0)
dependent on mode settings
(see
selected AD2 is output at CREF = 1 and AD1
is output at CREF = 0
reserved
multiplexed ADC MSB/LSB bypass
dependent on mode settings; only one ADC
should be selected at a time; ADx8 to ADx1
are outputs at CREF = 1 and ADx7 to ADx0
are outputs at CREF = 0
Programmable width in LLC8 steps via
HSB[7:0] 06h[7:0] and HSS[7:0] 07h[7:0]
Fine position adjustment in LLC2 steps via
HDEL[1:0] 11h[5:4] (see
B
Figure
-C
Section
Section
PAL/NTSC/SECAM video decoder
R
4 : 2 : 2 8-bit format (no SAV/EAV
Figure 24
25)
Figure
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
10.2.3); if both ADCs are
10.2.3); if both ADCs are
26)
and
SAA7114
Figure
Figure
Figure 24
25)
26)
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