SAA7114HV2T NXP Semiconductors, SAA7114HV2T Datasheet - Page 37

• Manufacturer Part Number: SAA7114HV2T
• Manufacturer: NXP Semiconductors

Specifications of SAA7114HV2T

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Philips Semiconductors
SAA7114_3
Product data sheet
Fig 25. Vertical timing diagram for 60 Hz/525 line systems
(1) The inactive going edge of the V123 signal indicates whether the field is odd or even. If HREF is active during the falling
single field counting
single field counting
edge of V123, the field is ODD (field 1). If HREF is inactive during the falling edge of V123, the field is EVEN. The specific
position of the slope is dependent on the internal processing delay and may change a few clock cycles from version to
version.
The control signals listed above are available on pins RTS0, RTS1, XRH and XRV according to
For further information see
ITU counting
ITU counting
F_ITU656
F_ITU656
V123
VGATE
V123
VGATE
CVBS
HREF
CVBS
HREF
FID
FID
(1)
(1)
525
262
262
262
VSTO [ 8:0 ] = 101h
VSTO [ 8:0 ] = 101h
263
263
Table
1
1
56,
264
2
2
1
Table 57
265
3
3
2
Rev. 03 — 17 January 2006
and
266
4
4
3
Table
267
5
5
4
(a) 1st field
(b) 2nd field
58.
268
6
6
5
269
7
7
6
270
8
8
7
271
PAL/NTSC/SECAM video decoder
9
9
8
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
272
10
10
9
Table
. . .
. . .
. . .
. . .
8.
VSTA [ 8:0 ] = 011h
VSTA [ 8:0 ] = 011h
SAA7114
284
21
21
21
mhb541
285
22
22
22
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