SAA7114HV2T NXP Semiconductors, SAA7114HV2T Datasheet - Page 118

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SAA7114HV2T

Manufacturer Part Number
SAA7114HV2T
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SAA7114HV2T

Lead Free Status / RoHS Status
Supplier Unconfirmed
Philips Semiconductors
SAA7114_3
Product data sheet
Table 124: Vertical chrominance scaling increment; register set A [B2h[7:0]; B3h[7:0]] and
Table 125: Vertical scaling mode control; register set A [B4h[4 and 0]] and
[1]
Table 126: Vertical chrominance phase offset ‘00’; register set A [B8h[7:0]] and B [E8h[7:0]]
Table 127: Vertical luminance phase offset ‘00’; register set A [BCh[7:0]] and B [ECh[7:0]]
Vertical chrominance
scaling increment
This value must be set
to the luminance value
YSCY[15:0]
Vertical scaling mode control
Vertical scaling performs linear interpolation between lines
Vertical scaling performs higher order accumulating interpolation, better
alias suppression
No mirroring
Lines are mirrored
Vertical chrominance
phase offset
Offset = 0
Offset =
Offset =
Vertical luminance
phase offset
Offset = 0
Offset =
Offset =
X = don’t care.
32
255
32
255
32
32
B [E2h[7:0]; E3h[7:0]]
B [E4h[4 and 0]]
32
32
= 1 line
= 1 line
lines
lines
Rev. 03 — 17 January 2006
Control bits
A [B3h[7:4]]
B [E3h[7:4]]
YSCC[15:12]
0000
1111
Control bits D7 to D0
YPC07 YPC06 YPC05 YPC04 YPC03 YPC02 YPC01 YPC00
0
0
1
Control bits D7 to D0
YPY07 YPY06 YPY05 YPY04 YPY03 YPY02 YPY01 YPY00
0
0
1
[1]
0
0
1
0
0
1
A [B3h[3:0]]
B [E3h[3:0]]
YSCC[11:8]
0000
1111
0
1
1
0
1
1
0
0
1
0
0
1
PAL/NTSC/SECAM video decoder
A [B2h[7:4]]
B [E2h[7:4]]
YSCC[7:4]
0000
1111
0
0
1
0
0
1
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
0
0
1
0
0
1
Control bits D4 and D0
YMIR
X
X
0
1
SAA7114
A [B2h[3:0]]
B [E2h[3:0]]
YSCC[3:0]
0001
1111
0
0
1
0
0
1
YMODE
0
1
X
X
118 of 144
0
0
1
0
0
1

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