SAA7114HV2T NXP Semiconductors, SAA7114HV2T Datasheet - Page 36

• Manufacturer Part Number: SAA7114HV2T
• Manufacturer: NXP Semiconductors

Specifications of SAA7114HV2T

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Philips Semiconductors
Table 8:
SAA7114_3
Product data sheet
Name
HREF
F_ITU656
V123
VGATE
FID
Fig 24. Vertical timing diagram for 50 Hz/625 line systems
(1) The inactive going edge of the V123 signal indicates whether the field is odd or even. If HREF is active during the falling
single field counting
single field counting
edge of V123, the field is ODD (field 1). If HREF is inactive during the falling edge of V123, the field is EVEN. The specific
position of the slope is dependent on the internal processing delay and may change a few clock cycles from version to
version.
The control signals listed above are available on pins RTS0, RTS1, XRH and XRV according to
For further information see
ITU counting
ITU counting
Control signals
F_ITU656
F_ITU656
V123
VGATE
V123
VGATE
CVBS
HREF
CVBS
HREF
FID
FID
(1)
(1)
RTS0
X
-
X
X
X
622
309
309
309
VSTO [ 8:0 ] = 134h
VSTO [ 8:0 ] = 134h
623
310
310
310
Table
56,
624
311
311
311
Table 57
625
312
312
312
Rev. 03 — 17 January 2006
RTS1
X
-
X
X
X
and
313
313
1
1
Table
314
2
2
1
(a) 1st field
(b) 2nd field
58.
315
3
3
2
316
4
4
3
XRH
X
-
-
-
-
317
5
5
4
318
PAL/NTSC/SECAM video decoder
6
6
5
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
319
7
7
6
Table
. . .
. . .
. . .
. . .
8.
XRV
-
X
X
-
-
VSTA [ 8:0 ] = 15h
VSTA [ 8:0 ] = 15h
SAA7114
335
22
22
22
mhb540
336
23
23
23
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