SAA7114HV2T NXP Semiconductors, SAA7114HV2T Datasheet - Page 53

• Manufacturer Part Number: SAA7114HV2T
• Manufacturer: NXP Semiconductors

Specifications of SAA7114HV2T

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Philips Semiconductors
SAA7114_3
Product data sheet
In
It should be noted that the equations of
the unscaled case, as the geometrical reference position for all conversions is the position
of the first line of the lower field; see
If there is no need for UP-LO and LO-UP conversion and the input field ID is the reference
for the back-end operation, then it is UP-LO = UP-UP and LO-UP = LO-LO and the
phase shift (PHO + 16) that can be skipped. This case is listed in
The SAA7114 supports 4 phase offset registers per task and component (luminance and
chrominance). The value of 20h represents a phase shift of one line.
The registers are assigned to the following events; e.g. subaddresses B8h to BBh:
Depending on the input signal (interlaced or non-interlaced) and the task processing
50 Hz or field reduced processing with one or two tasks (see examples in
Section
same.
Fig 32. Derivation of the phase related equations (example: interlace vertical scaling
•
•
•
•
Table 13
B8h: 00 = input field ID 0, task status bit D0 (toggle status; see
B9h: 01 = input field ID 0, task status bit D1
BAh: 10 = input field ID 1, task status bit D0
BBh: 11 = input field ID 1, task status bit D1
8.3.1.3), other combinations may also be possible, but the basic equations are the
Offset =
A =
B =
C =
D = no offset = 0
down to
field 1
upper
and
1
-- -
2
1
-- -
2
1
-- -
2
input line shift = 16
input line shift +
scale increment +
B
A
1024
----------- -
Table 14
32
3
5
, with field conversion)
= 32 = 1 line shift
lower
field 2
Rev. 03 — 17 January 2006
PHO is a usable common phase offset.
1
-- -
2
YSCY[15:0]
----------------------------- -
scale increment =
64
case UP-UP
Table
field 1
Figure 32
C
14.
YSCY[15:0]
----------------------------- -
case LO-LO
64
produce an interpolated output, also for
field 2
D
PAL/NTSC/SECAM video decoder
+
16
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
case UP-LO
field 1
Table
Section
SAA7114
case LO-UP
14.
field 2
mhb548
8.3.1.3)
53 of 144
1
2
line