MT48H8M32LFB5-75 IT:H Micron Technology Inc, MT48H8M32LFB5-75 IT:H Datasheet - Page 59

DRAM Chip Mobile SDRAM 256M-Bit 8Mx32 1.8V 90-Pin VFBGA Tray

MT48H8M32LFB5-75 IT:H

Manufacturer Part Number
MT48H8M32LFB5-75 IT:H
Description
DRAM Chip Mobile SDRAM 256M-Bit 8Mx32 1.8V 90-Pin VFBGA Tray
Manufacturer
Micron Technology Inc
Type
Mobile SDRAMr

Specifications of MT48H8M32LFB5-75 IT:H

Density
256 Mb
Maximum Clock Rate
133 MHz
Package
90VFBGA
Address Bus Width
14 Bit
Operating Supply Voltage
1.8 V
Maximum Random Access Time
8|6 ns
Operating Temperature
-40 to 85 °C
Format - Memory
RAM
Memory Type
Mobile SDRAM
Memory Size
256M (8Mx32)
Speed
133MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.95 V
Package / Case
90-VFBGA
Organization
8Mx32
Address Bus
14b
Access Time (max)
8/6ns
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
100mA
Pin Count
90
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 30: WRITE-to-PRECHARGE
PDF: 09005aef834c13d2
256mb_mobile_sdram_y36n.pdf - Rev. I 11/09 EN
Note:
Fixed-length WRITE bursts can be truncated with the BURST TERMINATE command.
When truncating a WRITE burst, the input data applied coincident with the BURST TER-
MINATE command is ignored. The last data written (provided that DQM is LOW at that
time) will be the input data applied one clock previous to the BURST TERMINATE com-
mand. This is shown in Figure 31 (page 60), where data n is the last desired data
element of a longer burst.
t
t
Command
Command
WR @
WR @
1. In this example DQM could remain LOW if the WRITE burst is a fixed length of two.
Address
Address
DQM
DQM
CLK
t
t
DQ
DQ
CK
CK < 15ns
15ns
WRITE
Bank a,
WRITE
Bank a,
Col n
D
Col n
D
T0
IN
IN
256Mb: 16 Meg x 16, 8 Meg x 32 Mobile SDRAM
NOP
NOP
D
D
T1
IN
IN
t
WR
59
PRECHARGE
(a or all)
Bank
NOP
T2
t
WR
Micron Technology, Inc. reserves the right to change products or specifications without notice.
PRECHARGE
(a or all)
Bank
T3
NOP
t RP
NOP
NOP
T4
t RP
ACTIVE
Bank a,
NOP
Row
T5
©2008 Micron Technology, Inc. All rights reserved.
WRITE Operation
Bank a,
Don’t Care
ACTIVE
NOP
Row
T6

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