MT48H8M32LFB5-75 IT:H Micron Technology Inc, MT48H8M32LFB5-75 IT:H Datasheet - Page 31

• Manufacturer Part Number: MT48H8M32LFB5-75 IT:H
• Description: DRAM Chip Mobile SDRAM 256M-Bit 8Mx32 1.8V 90-Pin VFBGA Tray
• Manufacturer: Micron Technology Inc
• Type: Mobile SDRAMr

Specifications of MT48H8M32LFB5-75 IT:H

• Density: 256 Mb
• Maximum Clock Rate: 133 MHz
• Package: 90VFBGA
• Address Bus Width: 14 Bit
• Operating Supply Voltage: 1.8 V
• Maximum Random Access Time: 8|6 ns
• Operating Temperature: -40 to 85 °C
• Format - Memory: RAM
• Memory Type: Mobile SDRAM
• Memory Size: 256M (8Mx32)
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.95 V
• Package / Case: 90-VFBGA
• Organization: 8Mx32
• Address Bus: 14b
• Access Time (max): 8/6ns
• Operating Supply Voltage (typ): 1.8V
• Package Type: VFBGA
• Operating Temp Range: -40C to 85C
• Operating Supply Voltage (max): 1.95V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 100mA
• Pin Count: 90
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PRECHARGE
Figure 11: PRECHARGE Command
BURST TERMINATE
AUTO REFRESH
PDF: 09005aef834c13d2
256mb_mobile_sdram_y36n.pdf - Rev. I 11/09 EN
The PRECHARGE command is used to deactivate the open row in a particular bank or
the open row in all banks. The bank(s) will be available for a subsequent row access a
specified time (
whether one or all banks are to be precharged, and in the case where only one bank is
precharged, inputs BA0 and BA1 select the bank. Otherwise BA0 and BA1 are treated as
“Don’t Care.” After a bank has been precharged, it is in the idle state and must be activa-
ted prior to any READ or WRITE commands are issued to that bank.
BA0, BA1
The BURST TERMINATE command is used to truncate either fixed-length or continu-
ous page bursts. The most recently registered READ or WRITE command prior to the
BURST TERMINATE command is truncated.
AUTO REFRESH is used during normal operation and is analogous to CAS#-BEFORE-
RAS# (CBR) REFRESH in FPM/EDO DRAM. Addressing is generated by the internal
refresh controller. This makes the address bits “Don’t Care” during an AUTO REFRESH
command.
Address
RAS#
CAS#
WE#
CKE
A10
CLK
CS#
HIGH
t
RP) after the PRECHARGE command is issued. Input A10 determines
Valid address
256Mb: 16 Meg x 16, 8 Meg x 32 Mobile SDRAM
Bank address
Bank selected
All banks
31
Don’t Care
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©2008 Micron Technology, Inc. All rights reserved.
Commands