M306N4FGTFP Renesas Electronics America, M306N4FGTFP Datasheet - Page 406
M306N4FGTFP
Manufacturer Part Number
M306N4FGTFP
Description
IC M16C MCU FLASH 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/6Nr
Datasheets
1.M30622SAFPU5.pdf
(308 pages)
2.M306N4FGGPU3.pdf
(94 pages)
3.M306N4FGGPU3.pdf
(414 pages)
Specifications of M306N4FGTFP
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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2.00 Nov. 10, 2004
Rev.
Date
REVISION HISTORY
296, 297 Figures 22.6 and 22.7 Timing Diagram (3) (4): "DB" in Read timing is revised to "DBi".
298, 299 Figures 22.8 and 22.9 Timing Diagram (5) (6): "DB" in Write timing is revised to "DBi".
Page
278
280
281
283
284
286
287
288
290
291
292
293
294
301
302
303
304
316
317
Figure 21.18 Pin Connections for CAN I/O Mode (2) is added.
Table 21.9 Flash Memory Version Electrical Characteristics
Table 22.1 Absolute Maximum Ratings
Table 22.3 Recommended Operating Conditions (2)
Figure 22.1 Timing of Voltage Fluctuation is added.
Table 22.4 Electrical Characteristics (1): Hysteresis
Table 22.6 A/D Conversion Characteristics: "Tolerance Level Impedance" is added.
Table 22.8 Power Supply Circuit Timing Characteristics: "t
Figure 22.2 Power Supply Circuit Timing Diagram is added.
Table 22.10 Memory Expansion Mode and Microprocessor Mode: "t
Table 22.21 Serial I/O: Min. of standard in t
Table 22.23 Memory Expansion Mode and Microprocessor Mode (for setting with no wait)
Table 22.24 Memory Expansion Mode and Microprocessor Mode (for 1- to 3-wait setting
and external area access)
Table 22.25 Memory Expansion Mode and Microprocessor Mode (for 2- to 3-wait setting,
external area access and multiplexed bus selection)
Figure 22.4 Timing Diagram (1): "XIN input" is added.
Figure 22.11 Timing Diagram (8)
23.1 External Bus: The description of the external ROM version is deleted.
23.2 PLL Frequency Synthesizer is revised.
23.3 Power Control
23.8.2.1 Special Mode 1 (I
23.8.3 SI/O3 is added.
• Parameter is added and the value of some item is revised.
• "Flash Program Erase" in Operating Ambient Temperature is added.
• Parameters of Power Supply Ripple are added.
• NOTE 4 is revised.
• "CLK4" is revised to "CLK3", and "TA2OUT" is revised to "TA0OUT".
•
• XIN is added.
• Max. of Standard in t
• t
• Max. of Standard in t
• t
• t
• Max. of Standard in t
• "ADi/DB" in Read/Write timing is revised to "ADi/DBi".
• 2nd item is added. (Set the MR0 bit in the TAiMR register to •••)
• 4th item is revised. (Wait for main clock oscillation •••)
• Section of "External clock" is deleted.
Max. of Standard in RESET is revised from "2.2" to "2.5".
d(BCLK-HLDA)
d(BCLK-HLDA)
d(BCLK-HLDA)
is added.
is added.
is added.
M16C/6N Group (M16C/6N4) Hardware Manual
____________
d(BCLK-ALE)
d(BCLK-ALE)
d(BCLK-ALE)
C-6
2
C Mode) is added.
Description
is revised from "25" to "15".
is revised from "25" to "15".
is revised from "25" to "15".
Summary
su(D-C)
is revised from "30" to "70".
d(M-L)
" is deleted.
d(BCLK-HLDA)
" is deleted.
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