M306N4FGTFP Renesas Electronics America, M306N4FGTFP Datasheet - Page 150
M306N4FGTFP
Manufacturer Part Number
M306N4FGTFP
Description
IC M16C MCU FLASH 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/6Nr
Datasheets
1.M30622SAFPU5.pdf
(308 pages)
2.M306N4FGGPU3.pdf
(94 pages)
3.M306N4FGGPU3.pdf
(414 pages)
Specifications of M306N4FGTFP
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
i = 0 to 5
j = i - 1, except j = 2 if i = 0, j = 5 if i = 3
NOTE:
Figure 13.19 Registers TB0MR to TB5MR in Event Counter Mode
Table 13.7 Event Counter Mode Specifications
Count source
Count operation
Divide ratio
Count start condition
Count stop condition
Interrupt request generation timing Timer underflow
TBiIN pin function
Read from timer
Write to timer
13.2.2 Event Counter Mode
1. Bits TB0S to TB2S are assigned to bits 5 to 7 in the TABSR register, and bits TB3S to TB5S are
In event counter mode, the timer counts pulses from an external device or overflows and underflows of
other timers. Table 13.7 lists the Event Counter Mode Specifications. Figure 13.19 shows Registers
TB0MR to TB5MR in Event Counter Mode.
assigned to bits 5 to 7 in the TBSR register.
Apr 14, 2006
Item
Timer Bi Mode Register (i= 0 to 5)
NOTES:
b7
1. Effective when the TCK1 bit = 0 (input from TBiIN pin). If the TCK1 bit = 1 (TBj overflow or underflow), these bits can
2. The port direction bit for the TBiIN pin is set to 0 (input mode).
b6
be set to 0 or 1.
b5
b4
page 126 of 376
b3
b2
b1
0 1
• External signals input to TBiIN pin (effective edge can be selected in program)
• Timer Bj overflow or underflow
• Down-count
• When the timer underflows, it reloads the reload register contents and
1/(n+1) n: set value of the TBi register
Set TBiS bit
Set TBiS bit to 0 (count stops)
Count source input
Count value can be read by reading the TBi register
• When not counting and until the 1st count source is input after counting start
• When counting (after 1st count source input)
b0
continues counting
Value written to the TBi register is written to both reload register and counter
Value written to the TBi register is written to only reload register
(Transferred to counter when reloaded next)
Bit Symbol
TMOD0
TMOD1
TCK0
TCK1
MR0
MR1
MR2
MR3
TB0MR to TB2MR
TB3MR to TB5MR
Symbol
Operating mode select bits 0 1 : Event counter mode
Event clock select bit
(1)
Count polarity select bits
Registers TB0MR and TB3MR
Set to 0 in event counter mode
If necessary, set to 0 in event counter mode.
When read in event counter mode, the content is undefined.
Has no effect in event counter mode.
Can be set to 0 or 1.
Registers TB1MR, TB2MR, TB4MR, and TB5MR
Nothing is assigned. If necessary, set to 0.
When read, the content is undefined.
to 1 (count starts)
Bit Name
039Bh to 039Dh
01DBh to 01DDh
Address
(1)
Specification
b3 b2
0 0 : Counts falling edge of external signal
0 1 : Counts rising edge of external signal
1 0 : Counts falling and rising edges of
1 1 : Do not set a value
0 : Input from TBiIN pin
1 : TBj overflow or underflow
b1 b0
(j = i – 1, except j = 2 if i = 0,
external signal
00XX0000b
00XX0000b
After Reset
Function
0000h to FFFFh
j = 5 if i = 3)
(2)
RW
RW
RW
RW
RW
RW
RW
RW
RO
-
13. Timers
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