M306N4FGTFP Renesas Electronics America, M306N4FGTFP Datasheet - Page 302

• Manufacturer Part Number: M306N4FGTFP
• Description: IC M16C MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/6Nr

Specifications of M306N4FGTFP

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
21.5 Parallel I/O Mode
In parallel I/O mode, the user ROM area and the boot ROM area can be rewritten by a parallel programmer
supporting the M16C/6N Group (M16C/6N4). Contact your parallel programmer manufacturer for more
information on the parallel programmer. Refer to the user's manual included with your parallel programmer
for instructions.
21.5.1 User ROM and Boot ROM Areas
21.5.2 ROM Code Protect Function
An erase block operation in the boot ROM area is applied to only one 4-Kbyte block. The rewrite control
program in standard serial I/O and CAN I/O modes are written in the boot ROM area before shipment. Do
not rewrite the boot ROM area if using the serial programmer.
In parallel I/O mode, the boot ROM area is located in addresses 0FF000h to 0FFFFFh. Rewrite this
address range only if rewriting the boot ROM area. (Do not access addresses other than addresses
0FF000h to 0FFFFFh.)
The ROM code protect function prevents the flash memory from being read and rewritten in parallel I/O
mode. (Refer to 21.2 Functions to Prevent Flash Memory from Rewriting.)
Apr 14, 2006
page 278 of 376
21. Flash Memory Version