M306N4FGTFP Renesas Electronics America, M306N4FGTFP Datasheet - Page 192

• Manufacturer Part Number: M306N4FGTFP
• Description: IC M16C MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/6Nr

Specifications of M306N4FGTFP

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
Figure 15.23 I
SDAi
SCLi
This diagram applies to the case where bits SMD2 to SMD0 in the UiMR register = 010b and the IICM bit in the UiSMR register = 1.
i = 0 to 2
IICM: Bit in UiSMR register
IICM2, SWC, ALS, SWC2, SDHI: Bits in UiSMR2 register
STSPSEL, ACKD, ACKC: Bits in UiSMR4 register
NOTE:
Apr 14, 2006
1. If the IICM bit =1, the pins can be read even when the PD6_2, PD6_6 or PD7_1 bit = 1 (output mode).
Noise
Filter
2
C Mode Block Diagram
Noise
Filter
page 168 of 376
Delay
circuit
ACKC=1
IICM=1
IICM=0
ACKD bit
Falling edge
detection
UARTi
STSPSEL=0
I/O port
STSPSEL=0
STSPSEL=1
Start condition
detection
Stop condition
detection
ACKC=0
STSPSEL=1
D
T
Q
Q
R
SDHI
Port register
Arbitration
Internal clock
External
clock
ALS
SWC2
R
S
(1)
S
R
CLK
control
SCL(STSP)
SDA(STSP)
Q
Start and stop condition generation block
Receive register
9th bit falling edge
Transmit
register
Bus
busy
UARTi
UARTi
UARTi
SWC
9th bit
D
D
T
T
Q
Q
IICM2=1
ACK
IICM=1 and
IICM2=0
IICM2=1
IICM=1 and
IICM2=0
NACK
Start/stop condition
detection
interrupt request
UARTi transmit,
NACK interrupt
request
UARTi receive,
ACK interrupt request,
DMA1 request
DMA0, DMA1 request
(UART1: DMA0 only)
DMA0
(UART0, UART2)
15. Serial Interface