M306N4FGTFP Renesas Electronics America, M306N4FGTFP Datasheet - Page 170

IC M16C MCU FLASH 100QFP

M306N4FGTFP

Manufacturer Part Number
M306N4FGTFP
Description
IC M16C MCU FLASH 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/6Nr
Datasheets

Specifications of M306N4FGTFP

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
Figure 15.6 Registers U0MR to U2MR and U0C0 to U2C0
Apr 14, 2006
UARTi Transmit/Receive Mode Register (i = 0 to 2)
NOTES:
UARTi Transmit/Receive Control Register 0 (i = 0 to 2)
NOTES:
b7
b7
1. To receive data, set the corresponding port direction bit for each RXDi pin to 0 (input mode).
2. Set the corresponding port direction bit for pins SCL and SDA to 0 (input mode).
3. Set the corresponding port direction bit for each CLKi pin to 0 (input mode).
1. CTS1/RTS1 can be used when the CLKMD1 bit in the UCON register = 0 (only CLK1 output) and the
2. Set the corresponding port direction bit for each CTSi pin to 0 (input mode).
3. SCL2/P7_1 is N channel open-drain output. The NCH bit in the U2C0 register is N channel open-drain
4. The UFORM bit is enabled when bits SMD2 to SMD0 in the UiMR register are set to 001b (clock synchronous
5. When changing bits CLK1 to CLK0, set the UiBRG register.
6. Selected by the PCLK1 bit in the PCLKR register.
b6
b6
RCSP bit in the UCON register = 0 (CTS0/RTS0 not separated).
output regardless of the NCH bit.
serial I/O mode), or 101b (UART mode, 8-bit transfer data).
Set this bit to 1 when bits SMD2 to SMD0 are set to 010b (I
are set to 100b (UART mode, 7-bit transfer data) or 110b (UART mode, 9-bit transfer data).
b5
b5
b4
b4
page 146 of 376
b3
b3
b2
b2
b1
b1
b0
b0
UFORM
CKPOL
TXEPT
Symbol
CKDIR
IOPOL
Symbol
SMD0
SMD1
SMD2
PRYE
STPS
CLK0
CLK1
CRS
CRD
NCH
PRY
Bit
Bit
U0MR to U2MR
U0C0 to U2C0
Symbol
Symbol
Serial I/O mode
select bits
Internal/external clock
select bit
Stop bit length
select bit
Odd/even parity
select bit
Parity enable bit
TXD, RXD I/O polarity
reverse bit
UiBRG count source
select bits
CTS/RTS function
select bit
Transmit register
empty flag
CTS/RTS disable bit
Data output
select bit
CLK polarity
select bit
Transfer format
select bit
Bit Name
Bit Name
(1)
(3)
(4)
(1)
(5)
03A4h, 03ACh, 01FCh
03A0h, 03A8h, 01F8h
b2 b1 b0
b1 b0
0 0 0
0 0 1
0 1 0
1 0 0
1 0 1
1 1 0
Do not set a value except above
0 : Internal clock
1 : External clock
0 : 1 stop bit
1 : 2 stop bits
Effective when the PRYE bit = 1
0 : Odd parity
1 : Even parity
0 : Parity disabled
1 : Parity enabled
0 : No reverse
1 : Reverse
0 0 : f1SIO or f2SIO is selected
0 1 : f8SIO is selected
1 0 : f32SIO is selected
1 1 : Do not set a value
Effective when CRD = 0
0 : CTS function is selected
1 : RTS function is selected
0 : Data present in transmit register
1 : No data present in transmit register
0 : CTS/RTS function enabled
1 : CTS/RTS function disabled
0 : Pins TXDi/SDAi and SCLi are CMOS output
1 : Pins TXDi/SDAi and SCLi are
0 : Transmit data is output at falling edge
1 : Transmit data is output at rising edge
0 : LSB first
1 : MSB first
2
C mode), and to 0 when bits SMD2 to SMD0
Address
Address
(during transmission)
(P6_0, P6_4, P7_3 can be used as I/O ports)
(transmission completed)
N channel open-drain output
input at falling edge
of transfer clock and receive data is
input at rising edge
of transfer clock and receive data is
: Serial interface disabled
: Clock synchronous serial I/O mode
:
: UART mode transfer data 7-bit long
: UART mode transfer data 8-bit long
: UART mode transfer data 9-bit long
I
2
C mode
Function
Function
(3)
(2)
After Reset
After Reset
00001000b
(2)
00h
(6)
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RO
15. Serial Interface

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