M306N4FGTFP Renesas Electronics America, M306N4FGTFP Datasheet - Page 377

• Manufacturer Part Number: M306N4FGTFP
• Description: IC M16C MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/6Nr

Specifications of M306N4FGTFP

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
23.8.1.3 Timer A (One-shot Timer Mode)
The timer remains idle after reset. Set the mode, count source, counter value, etc. using the TAiMR
(i = 0 to 4) register, the TAi register, bits TA0TGL and TA0TGH in the ONSF register, and the TRGSR
register before setting the TAiS bit in the TABSR register to 1 (count starts).
Always make sure the TAiMR register, bits TA0TGL and TA0TGH, and the TRGSR register are modified
while the TAiS bit remains 0 (count stops) regardless whether after reset or not.
When setting the TAiS bit to 0 (count stops), the followings occur:
• A counter stops counting and a content of reload register is reloaded.
• TAiOUT pin outputs “L”.
• After one cycle of the CPU clock, the IR bit in the TAiIC register is set to 1 (interrupt request).
Output in one-shot timer mode synchronizes with a count source internally generated. When an external
trigger has been selected, one-cycle delay of a count source as maximum occurs between a trigger
input to TAiIN pin and output in one-shot timer mode.
The IR bit is set to 1 when timer operating mode is set with any of the following procedures:
• Select one-shot timer mode after reset.
• Change an operating mode from timer mode to one-shot timer mode.
• Change an operating mode from event counter mode to one-shot timer mode.
To use the timer Ai interrupt (the IR bit), set the IR bit to 0 after the changes listed above have been
made.
When a trigger occurs, while counting, a counter reloads the reload register to continue counting after
generating a re-trigger and counting down once. To generate a trigger while counting, generate a second
trigger between occurring the previous trigger and operating longer than one cycle of a timer count
source.
If a low-level signal is applied to the NMI pin when the IVPCR1 bit in the TB2SC register = 1 (three-phase
output forcible cutoff by input on NMI pin enabled), pins TA1OUT, TA2OUT, and TA4OUT go to a
high-impedance state.
Apr 14, 2006
page 353 of 376
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23. Usage Notes