HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 660

• Manufacturer Part Number: HD6417712BPV
• Description: MPU 1.5/3.3V 0K PB-FREE 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Ethernetr

Specifications of HD6417712BPV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, FIFO, SCI, SIO
• Peripherals: DMA, POR, WDT
• Number Of I /o: 24
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 17 Serial I/O with FIFO (SIOF)
17.4.3
The SIOF performs the following transfer.
• Transmit/receive data: Transfer of 8-bit data/16-bit data/16-bit stereo data
• Control data: Transfer of 16-bit data (uses the specific register as interface)
Transfer Mode: The SIOF supports the following four transfer modes as listed in table 17.3. The
transfer mode can be specified by the TRMD1 and TRMD0 bits in SIMDR.
Table 17.3 Serial Transfer Modes
Frame Length: The length of the frame to be transferred by the SIOF is specified by the FL3 to
FL0 bits in SIMDR. Table 17.4 shows the relationship between the settings of the FL3 to FL0 bits
and frame length.
Rev. 1.00 Dec. 27, 2005 Page 616 of 932
REJ09B0269-0100
Transfer Mode
Slave mode 1
Slave mode 2
Master mode 1
Master mode 2
SCK_SIO
RXD_SIO
SIOFSYNC
TXD_SIO
(a) Falling-edge sampling
Transfer Data Format
SIOFSYNC
Synchronous pulse
Synchronous pulse
Synchronous pulse
L/R
Figure 17.4 SIOF Transmit/Receive Timing
Reception timing
Transmission timing
SCK_SIO
RXD_SIO
SIOFSYNC
TXD_SIO
Bit Delay
One bit
One bit
One bit
No
(a) Rising-edge sampling
Control Data
Slot position
Secondary FS
Slot position
Not supported
Reception timing
Transmission timing