HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 408

• Manufacturer Part Number: HD6417712BPV
• Description: MPU 1.5/3.3V 0K PB-FREE 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Ethernetr

Specifications of HD6417712BPV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, FIFO, SCI, SIO
• Peripherals: DMA, POR, WDT
• Number Of I /o: 24
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 12 Bus State Controller (BSC)
Burst ROM (Clock Asynchronous):
• CS0WCR
Rev. 1.00 Dec. 27, 2005 Page 364 of 932
REJ09B0269-0100
Bit
31 to 21 
20
19, 18
17
16
15 to 11 
Bit Name
BEN

BW1
BW0
Initial
Value
All 0
0
All 0
0
0
All 0
R/W
R
R/W
R
R/W
R/W
R
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Burst Enable Specification
Enables or disables 8-burst access for a 16-bit bus width
or 16-burst access for an 8-bit bus width during 16-byte
access. If this bit is set to 1, 2-burst access is performed
four times when the bus width is 16 bits and 4-burst
access is performed four times when the bus width is 8
bits.
To use a device that does not support 8-burst access or
16-burst access, set this bit to 1.
0: Enables 8-burst access for a 16-bit bus width and 16-
1: Disables 8-burst access for a 16-bit bus width and 16-
Reserved
These bits are always read as 0. The write value should
always be 0.
Number of Burst Wait Cycles
Specify the number of wait cycles to be inserted between
the second or later access cycles in burst access.
00: 0 cycle
01: 1 cycle
10: 2 cycles
11: 3 cycles
Reserved
These bits are always read as 0. The write value should
always be 0.
burst access for an 8-bit bus width.
burst access for an 8-bit bus width.