HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 625

MPU 1.5/3.3V 0K PB-FREE 256-BGA

HD6417712BPV

Manufacturer Part Number
HD6417712BPV
Description
MPU 1.5/3.3V 0K PB-FREE 256-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH Ethernetr
Datasheet

Specifications of HD6417712BPV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, FIFO, SCI, SIO
Peripherals
DMA, POR, WDT
Number Of I /o
24
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417712BPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
No
No
No
Write transmit data in SCFTDR and
Clear TE and RE bits in SCSCR to 0
Read receive data in SCFRDR and
Figure 16.18 Sample Serial Data Transmission/Reception Flowchart
Start transmission and reception
clear RDF flag in SCFSR to 0
Read TDFE flag in SCFSR
Read ORER flag in SCLSR
read TDFE flag in SCFSR
Read RDF flag in SCFSR
All data received?
Initialization
ORER = 1?
TDFE = 1?
RDF = 1?
End
No
Yes
Yes
Yes
Error handling
Yes
Section 16 Serial Communication Interface with FIFO (SCIF)
1.
2.
3.
4.
5.
Note: When switching from transmission or reception
SCIF initialization: See figure 16.3, Sample
SCIF Initialization Flowchart.
SCIF status check and receive data write:
Read SCFSR, check that the TDFE flag is
set to 1, then write transmit data in SCFTDR
and clear the TDFE flag to 0. Notification that
the TDFE flag has changed from 0 to 1 can
also be given by the TXI.
Receive error handling: If a receive error occurs,
read the ORER flag in SCLSR, then after
executing the necessary error handling, clear
the ORER flag to 0. Serial reception cannot be
continued while the ORER flag is set to 1.
SCIF status check and receive data read:
Read SCFSR, check that the RDF flag is set
to 1, then read receive data from SCFRDR
and clear the RDF flag to 0. Notification that
the RDF flag has changed from 0 to 1 can also
be given by the RXI.
Serial transmission/reception continuation
procedure: To continue serial reception, before
the MSB of the current frame is received, read
the RDF flag and SCFRDR and clear the RDF
flag to 0. Also, check that the TDFE flag is set
to 1 and data can be written before transmitting
the MSB of the current frame. Futhermore, write
data in SCFTDR and clear the TDFE flag to 0.
Rev. 1.00 Dec. 27, 2005 Page 581 of 932
to simultaneous transmission and reception,
clear the TE and RE bits to 0, then set the both
bits to 1 simultaneously.
REJ09B0269-0100

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