DV164136 Microchip Technology, DV164136 Datasheet - Page 324

DEVELOPMENT KIT FOR PIC18

DV164136

Manufacturer Part Number
DV164136
Description
DEVELOPMENT KIT FOR PIC18
Manufacturer
Microchip Technology
Series
PIC®r
Type
MCUr
Datasheets

Specifications of DV164136

Contents
Board, Cables, CDs, PICkit™ 3 Programmer, Power Supply
Processor To Be Evaluated
PIC18F8722, PIC18F87J11
Interface Type
RS-232, USB
Operating Supply Voltage
3.3 V, 5 V
Silicon Manufacturer
Microchip
Core Architecture
PIC
Core Sub-architecture
PIC18
Silicon Core Number
PIC18F
Silicon Family Name
PIC18F8xxx
Kit Contents
PIC18 Exp Brd PICkit 3 Cable CD PSU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
PIC18F8722, PIC18F87J11
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DV164136
Manufacturer:
MICROCHIP
Quantity:
12 000
PIC18F8722 FAMILY
TABLE 26-1:
DS39646C-page 322
a
bbb
BSR
C, DC, Z, OV, N
d
dest
f
f
f
GIE
k
label
mm
*
*+
*-
+*
n
PC
PCL
PCH
PCLATH
PCLATU
PD
PRODH
PRODL
s
TBLPTR
TABLAT
TO
TOS
u
WDT
WREG
x
z
z
{
[text]
(text)
[expr]<n>
< >
italics
s
d
s
d
}
Field
OPCODE FIELD DESCRIPTIONS
RAM access bit:
a =
a =
Bit address within an 8-bit file register (0 to 7).
Bank Select Register. Used to select the current RAM bank.
ALU status bits: Carry, Digit Carry, Zero, Overflow, Negative.
Destination select bit:
d =
d =
Destination: either the WREG register or the specified register file location.
8-bit Register file address (00h to FFh), or 2-bit FSR designator (0h to 3h).
12-bit Register file address (000h to FFFh). This is the source address.
12-bit Register file address (000h to FFFh). This is the destination address.
Global Interrupt Enable bit.
Literal field, constant data or label (may be either an 8-bit, 12-bit or a 20-bit value).
Label name.
The mode of the TBLPTR register for the table read and table write instructions.
Only used with table read and table write instructions:
The relative address (2’s complement number) for relative branch instructions or the direct address for
Call/Branch and Return instructions.
Program Counter.
Program Counter Low Byte.
Program Counter High Byte.
Program Counter High Byte Latch.
Program Counter Upper Byte Latch.
Power-Down bit.
Product of Multiply High Byte.
Product of Multiply Low Byte.
Fast Call/Return mode select bit:
s =
s =
21-bit Table Pointer (points to a Program Memory location).
8-bit Table Latch.
Time-out bit.
Top-of-Stack.
Unused or Unchanged.
Watchdog Timer.
Working register (accumulator).
Don’t care (‘
compatibility with all Microchip software tools.
7-bit offset value for Indirect Addressing of register files (source).
7-bit offset value for Indirect Addressing of register files (destination).
Optional argument.
Indicates an indexed address.
The contents of text.
Specifies bit n of the register indicated by the pointer
Assigned to.
Register bit field.
In the set of.
User-defined term (font is Courier).
0
1
0
1
0
1
No Change to register (such as TBLPTR with table reads and writes)
Post-Increment register (such as TBLPTR with table reads and writes)
Post-Decrement register (such as TBLPTR with table reads and writes)
Pre-Increment register (such as TBLPTR with table reads and writes)
: do not update into/from shadow registers
: certain registers loaded into/from shadow registers (Fast mode)
: RAM location in Access RAM (BSR register is ignored)
: RAM bank is specified by BSR register
: store result in WREG
: store result in file register f
0
’ or ‘
1
’). The assembler will generate code with x =
Description
expr
.
0
. It is the recommended form of use for
© 2008 Microchip Technology Inc.

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